20 AIE-ML code generation in Vitis Model Composer

Introduction

Designing applications for the AMD Versal™ AI Engine‑ML (AIE‑ML) architecture traditionally requires writing graph and kernel code by hand, which can be time‑consuming and error‑prone—especially when exploring multiple algorithmic variations. AMD Vitis™ Model Composer removes much of this complexity by allowing you to build AI Engine‑ML designs directly in Simulink® and automatically generate the corresponding C++ graph code, kernel sources, and build infrastructure.

In the previous tutorial, we have seen how we can use the AMD Vitis™ Model Composer (VMC) add-on for MATLAB™ Simulink® to create an AI Engine graph using a model based approach and then simulate it inside the Simulink environment.

In this tutorial we will see how we can generate the AI Engine code, what files are produced, how we can run AI Engine simulation in VMC and export the project to Vitis.

Note: This tutorial was created using AMD Vitis 2025.2. Tool flow may vary in other versions of the tool.

AI Engine code generation with Vitis Model Composer

We have seen in the previous tutorial, that the Vitis Model Composer hub block needs to be added to every VMC project to define the device target. This is also used to generate the AI Engine graph and run AI Engine simulation. Let see how that works.

I am first opening the VMC model from the previous tutorial:

https://github.com/xflorentw/AI_Engine_Basic/tree/main/02_FFT_AIE-ML/vmc/fft_DSPLib.slx

If we open the Vitis Model Composer hub block in the Code Generation section, we can read that we need a subsystem to generate the code

To create a subsystem, we could take the subsystem block from the library browser, under AMD Toolbox > Utilities > Port & Subsystems and then move the AI Engine blocks into it using copy and paste.

But there is also a faster option which is to select the AI Engine blocks we want to include to the subsystem -- in our case only the FFT_AIE-ML -- and then simply press Ctrl+G. We can see the subsystem block replacing our FFT_AIE-ML block

We can then open the subsystem and see that our FFT_AIE-ML block is included into it and connected to the subsystem's ports.

Now if we go back in the Code Generation section of the Vitis Model Composer hub block we can see our subsystem.

We will not add any AIE Compiler Options for this project so we can move to the Analyze tab. This section is to tun the System-C simulation (aiesimulation) and verify the results against the data from Simulink. We can click on Analyze which will build the design with target=hw and run the simulation for us.

We can see from the log that the tool has compiled and simulated our graph successfully

Reviewing the Vitis Model Composer generated code

The code generated is located in the code/ip/Subsytem directory under the working directory

We can see that we have the top level file (Subsystem.cpp), the graph file (Subsystem.h) and a source file (FFT_42712c8c.h) containing the configuration of the FFT from the DSP Library.

The data folder also contains input data files and golden output data files.

With all the files generated we could create a project in Vitis and compile our AI Engine graph and this without having the need to write any line of AI Engine code.

The final Model Composer design is available on my GitHub repository:

https://github.com/xflorentw/AI_Engine_Basic/tree/main/02_FFT_AIE-ML/vmc/fft_DSPLib_codeGen.slx

Summary

In this tutorial, we have seen how Vitis Model Composer can help speeding up your prototyping and simulation for AMD Versal devices. We walked through creating a subsystem for the AI Engine blocks, running simulation, and generating the AI Engine design—all without writing a single line of AI Engine code by hand.

If you are interested to learn more about Vitis Model Composer, you can find useful examples and tutorials on the AMD/Xilinx GitHub repository:

https://github.com/Xilinx/Vitis_Model_Composer

Disclaimers

• AMD, Versal, and Vitis are trademarks or registered trademarks of Advanced Micro Devices, Inc.
• MathWorks, Simulink, DSP System Toolbox and MATLAB are trademarks or registered trademarks of The MathWorks, Inc.
• Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.