19 AIE-ML model based FFT design using Vitis Model Composer

Introduction

In previous articles, we have seen how we can create an FFT application on the AMD Versal AIE-ML architecture without the need of doing any AIE-ML kernel coding by using the AMD DSP Library. Then, we have seen how we can use the Vitis Functional Simulation to simulate our AIE-ML graph inside the MATLAB environment.

There is another tool from AMD, called Vitis™ Model Composer (VMC) which reduces the AI Engine coding requirement to 0 (no graph coding involved).

The AMD Vitis Model Composer is a model-based design tool that enables rapid design exploration within the Simulink® environment and accelerates the path to production on AMD devices through automatic code generation.

All the DSP Library blocks for AI Engine are provided as part of the AMD Toolbox inside Simulink.

Not only Vitis Model Composer avoid any coding mistakes for the graph (and kernels when using the blocks provided), it also provide a quick way to configure the DSP Library with a valid configuration.

VMC can be installed using the Vitis Unified Installer

Vitis Model composer requires an add-on license from AMD as well as the licenses for MATLAB™ and Simulink®. When you are doing DSP design I would also highly recommend you to have the MATLAB™ DSP System Toolbox.

If you want to just evaluate the tool, you can generate a free evaluation license e from the AMD Product Licensing Site.

For documentation on Vitis Model Composer refer to the AMD UG1483:

https://docs.amd.com/r/en-US/ug1483-model-composer-sys-gen-user-guide

Note: This tutorial was created using AMD Vitis 2025.2. Tool flow may vary in other versions of the tool.

Creating the Vitis Model Composer Design

With the Vitis Model Composer (VMC) installed as part of the Vitis tools and the licenses for VMC, MATLAB™ and Simulink® set up, to start VMC we just need to set up the Vitis Tools, MATLAB™ and then call model_composer.

source <install location>/2025.2/Vitis/settings64.sh
source <install location>/2025.2/Model_Composer/settings64.sh
model_composer

This will start MATLAB™ with the Vitis Model Composer Add on set.

As VMC is available as part of the Simulink® environment, the first step is to start Simulink

And we can start with a blank model

If you open the Library Browser you should see the AMD Toolbox under which we have blocks targeting AI Engine or the Programmable Logic (HDL or HLS).

The first block that I am always adding is the Vitis Model Composer Hub block. Every Model Composer model requires a Model Composer Hub to configure the compilation, simulation and to generate outputs. This is the block in which, for example, you will define which device or board you are targeting, thus when working with AI Engine, it will define which variant or the architecture (AIE, AIE-ML or AIE-MLv2) you are using.You can find the Vitis Model Composer Hub block in the AMD Toolbox under Utilities > Code Generation.

We can drag and drop the block to add it to the model and then double-click on it to configure it. I am only selecting the target device. I am using the xcve2302-sfva784-1LP-e-S which is on the Trenz TE0950 as in my previous tutorials.

Then we can start creating our design. What we want to do is a simple 1024-point FFT. As in this previous article, we can use the AMD DSP Library for that as this is integrated in VMC as part of the AMD Toolbox. We can find the FFT block for AI Engine under AI Engine > DSP > Buffer IO.

We can drag and drop the FFT block to the model and double click on it to configure it. To be in a similar use case as in the previous tutorials, I am only configuring the FFT size (and I keep the input, output and twiddle factor data types to cint16) and leave all the other parameters as default

Then to simulate our FFT block we need an input signal. For this I am using the sine wave from the MATLAB DSP System Toolbox so it can generate a discrete input signal. I am adding 2 of them so I can get a 2 tone signal as in the previous project.

For the first one I am setting the amplitude to 6, the output frequency to 150MHz, the output as complex, the sample frequency to 600 MHz and the number of sample per fame to 1024. I am also setting the computation method to Table Lookup as this is required when the output data is in fixed point as I will set.

In the "Data Types" tab, I am setting the output as 16-bit fixed point

Then I am copying and pasting this block to create the other tone component of our input signal. I am just changing the amplitude to 4 and the frequency to 50MHz

Then I am simply adding an "add' block to add the to tones and feed to the AI Engine FFT block

Then to verify the output of the FFT we need to plot the output. For this I am using the array plot block from the MATLAB DSP System Toolbox. I only want to plot the absolute value to just see the frequency components of my signal so I am also adding an "abs" block. And as the abs block only accept double data types when the data is complex, I am also adding a block to convert the output of the FFT block to double.

This is what my full design looks like

We can run the simulation. As we have set our sample time to 1/600e6 we might want to stop the simulation after few windows of 1024 samples. I am using 2 for reference (2*1024/600e6)

We can see that we have as expected 2 main frequency components to our signal

Comparing the FFT results with a MATLAB implementation

The FFT from the AI Engine block seems to be working correctly but it might be good to validate the results but comparing with the MATLAB implementation of the FFT. To do this I am simply replicating the branch and replacing the AI Engine FFT by the FFT from the MATLAB DSP System Toolbox.

The only change to the FFT block I made was to change the Output data type to 16-bit fixed point.

Running the simulation give us very similar results between the FFT from MATLAB and the one implemented on AIE-ML so our implementation in AIE-ML seems to match our needs.

Summary

In this project we have seen how we can use Vitis Model Composer - which is a toolbox inside MATLAB- to create an AIE-ML design using a model based approach.

You can find the final vmc model on my GitHub repository

https://github.com/xflorentw/AI_Engine_Basic/tree/main/02_FFT_AIE-ML/vmc/fft_DSPLib.slx

Disclaimers

• AMD, Versal, and Vitis are trademarks or registered trademarks of Advanced Micro Devices, Inc.
• MathWorks, Simulink, DSP System Toolbox and MATLAB are trademarks or registered trademarks of The MathWorks, Inc.
• Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.