Getting Started with Sapphire Edge+ and AMD Embedded+

Introduction

One of the FPGA related products I have been looking forward to trying is the Sapphire Edge+ system, which introduces the new AMD Embedded+ architecture.

AMD Embedded+ architecture is very interesting to me as it combines the AMD Ryzen™ Embedded R2314 processor, with the AMD Versal™ AI Edge Series 2302 adaptive SoC connected via PCIe®.

This enables developers to leverage real time sensor interfacing and processing using the Versal AI Edge Series 2302 adaptive SoC, while leveraging the Ryzen processor to perform none time critical calculations and higher-level decision making.

If you are not familiar with the Ryzen Embedded R2314 processor, it provides users with 4 CPU Cores, each capable of running at up to 3.5 GHz, while Radeon™ graphics provide the capability of supporting up to four 4K displays.

Ryzen R2000 series embedded processors are designed to bring together the Zen+ x86 architecture with Radeon graphics to target industrial, robotics, and machine vision applications.

You may be a little more familiar with the Versal Edge 2302 adaptive SoC. This adaptive SoC combines a control and processing system containing a dual core A72, and dual core R5Fs, along with programmable logic and AI Engine-ML. Connecting the processor system, PL, AIE, and integrated peripherals in a network on chip which enables high bandwidth connectivity across the device.

The architecture of the Edge+ system from Sapphire is well thought out, with the primary high-speed connectivity being PCIe. While the JTAG can be accessed over either external USB or USB from the Ryzen processor.

To facilitate the interfacing with real world sensors, the Versal AI Edge series 2302 adaptive SoC has XPIO, GTYP, and HDIO interfaces broken out to the expansion connector.

Development Flow.

The development flow for the Embedded+ architecture is very similar to that of an AMD Alveo™ accelerator card.

On the Ryzen x86 processor, the XRT run time is installed. This installation enables the developers to develop applications on the host, which can load device images over the PCIe connection.

Once the device image is loaded into the Versal 2302 adaptive SoC, the host application using OpenCL can transfer data between the Ryzen processor and Versal adaptive SOC along with controlling its configurations and settings.

To enable the development of applications, which can be loaded as device images, a platform must be loaded into the Versal adaptive SoC from the OSPI at power on.

This allows the Ryzen x86 processor to download an overlay image with the application over PCIe.

To ensure combability between platform and overlay, a UUID (universally unique ID) is used in both the platform and overlay. For the application to work correctly, both the platform and overlay must have the same UUID.

For this example, we will develop our application using an AMD Vitis™ software platform flow as we have done in previous projects - System Design with Vitis and Versal AIE.

Sapphire Edge+ Set Up

The Sapphire Edge+ is a comprehensive compute system in its own right, therefore I want to make sure it is correctly set up on my office network to enable development.

I also then want to ensure the XRT system is correctly set up and configured before we work on our application.

To get started, I want to install XRDP on the Edge+ system to enable remote access to the Edge+ board for faster development.

sudo apt-get update
sudo apt-get install xrdp

I then set up a lightweight desktop..

sudo apt-get install xfce4

With this installed, I was able to remotely connect to the Edge+ system and start development..

The next step is to ensure XRT is installed correctly, and check which version of the platform is installed to ensure we select the correct development tool chain.

One of the first steps is to ensure the Versal adaptive SoC contains the correct OSPI image. To update this image, we need to install a hardware server and a simple script that can be downloaded from the AMD Github.

We also need to download the latest OSPI image, which can be accessed here (with an account).

With these artifacts and hardware servers installed, we can run the command to update the Versal adaptive SoC OSPI. This might take a few minutes.

sudo ./prog_spi.sh -d embplus -Vpv -i ../emb-plus-ospi-vmr-emb-plus-ve2302-<version>-xrt.bin

The next step is to update XRT and install the test applications. To get started, we will update the XRT.

Download the latest XRT here and run the command below to install.

sudo dpkg -i xrt_<version>-amd64-xrt.deb

Successful completion will show:

We can also check on the lsmod to ensure it is correct.

The next stage is to install the Embedded+ architecture base design, along with three test applications to enable us to check communication and performance.

sudo dpkg -i xrt-emb-plus-ve2302-base_1.2.deb
sudo dpkg -i xrt-verify-test-ve2302_1.2.deb
sudo dpkg -i xrt-bandwidth-dma-test-ve2302_1.2.deb
sudo dpkg -i xrt-aie-test-ve2302_1.2.deb

The next stage is to install the APU Linux package.

sudo dpkg -i xrt-apu-linux-ve2302_1.2.deb

With the OSPI, XRT, base, and test applications installed and updated, we are ready to begin testing the installation.

However, before we can do this, we need to reboot the system to ensure all the changes were affected.

Testing the Sapphire Edge+ Setup

When the Edge+ system powers back up, the next step is to check we can see the Versal AI Edge Series 2302 adaptive SoC connected to the PCIe bus.

Issuing the command below should result in a report similar to the screenshot shown below

sudo lspci -vd 10ee:

With the Versal AI Edge Series 2302 adaptive SoC connected on the PCIe bus, we can set up the XRT.

source /opt/xilinx/xrt/setup.sh

The first step is to examine the system, XRT, and device configurations. UUID provides the identification of the tool chain to use. In this case, it identifies the 2025.1.1 tool chain.

xbmgmt examine

We have demonstrated physical connection and examined the configuration. The next step is to perform a simple “hello world” test which loads a kernel into the Versal AI Edge Series adaptive SoC and checks if the functionality is as expected..

xrt-smi validate -r verify -d --verbose

Having demonstrated that a kernel can be loaded in the Versal AI Edge Series adaptive SoC, the next test is to validate the DMA data transactions.

xrt-smi validate -r dma -d --verbose

The next test is to test the DDR bandwidth.

xrt-smi validate -r mem-bw -d --verbose

The final test is to verify if we are able to communicate with the AIE.

xrt-smi validate -r aie -d --verbose

We are now ready to begin creating our own design. To do this we need the 2025.1.1 tool chain.

AMD Vitis™ Software Platform Set Up

As the Edge+ system has 32GB of memory and 1 TB of SSD, and the Ryzen processor has four cores operating at up to 3.5HZ, I decided I would install Vitis software platform on the Edge+ system.

The first step was to download the AMD Unified Installer and install the Vitis software platform on the Edge+ as we will only be targeting one device, the Versal AI Edge Series 2302 adaptive SoC.

The next step was to select the location to install the Vitis software platform

Once the tools are installed, we can create a new test application. To do this, we first need to download the correct platform. The platform depends on the UUID, we are able to download the platform here.

We need to download the platform which supports 2025.1.1.

From the releases tab select 1v2 for 2025.1.1 support.

Once this has been downloaded, we need to unzip it into a directory that we wish to use as our repository for platforms.

Once this is extracted under the folder with the platform name, you will see HW and SW elements of the platform. Along with an overall description of the platform in the xpfm file.

With the platform available, we are then able to open Vitis Unified IDE

From the Vitis software platform menu, select “Platform Repositories”. When the dialog opens, select “Add” and point to the directory containing the Edge+ platform we downloaded.

The platform we just installed will then be visible under the platform repositories dialog, showing as a Data Center platform.

We are now able to create one of the example applications to pipe clean the application creation.

From the Vitis software platform built in examples, select the Simple Vector Addition application.

Assign a project name and select the location for the project.

Select the platform just added to the Vitis software platform.

Click Finish.

Click on the “Build All” option and wait a few minutes while the design is created. This will take several minutes as the addition kernel needs to be synthesized and built into the XCLBin for download in the Versal adaptive SoC, along with the host application.

Once the project has been built, you will see a green checkmark.

To test this on hardware, click to run the application on the host and the Versal AI Edge Series adaptive SoC.

Wrap Up

This project has shown how we are able to develop applications for the Sapphire Edge+ system which uses AMD Embedded+ architecture. Having created a simple application and pipe cleaned the development process, we will look in a future project soon for a more complex development.

AMD sponsored this project, including engineering hours. AMD, and the AMD Arrow logo, Alveo, Radeon, Ryzen, Versal, Vitis, and combinations thereof are trademarks of Advanced Micro Devices, Inc. Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.