Building the Ultra96-V2 PYNQ Base Overlay

Introduction

Today I will show you how to rebuild the PYNQ base overlay for the Ultra96-V2 board. I am doing all these with Vivado 2020.1

As of writing, Ubuntu 20.04 LTS is not supported by Vivado 2020.1 yet. I have tried it and managed to get it to compile but I had to fix a lot of dependency issues. I will recommend installing Ubuntu 18.04.2 LTS in a virtual machine which is much cleaner.

Install the Avnet board definition files

Before we begin, ensure that the Avnet Board Definition Files (BDF) are installed. These BDFs contain the configuration for a board that is required when creating a new project in Vivado.

To install, go to your Vivado board_files directory

$ cd /opt/Xilinx/Vivado/2020.1/data/boards/board_files

Then we can clone the bdf here.

$ git clone https://github.com/Avnet/bdf avnet_bdf

To verify that everything is installed correctly, you will be able to see the new boards when you create a new RTL project in Vivado.

These are some more detailed instructions for your reference:

• http://zedboard.org/sites/default/files/documentations/Installing-Board-Definition-Files_v1_0.pdf

Prepare the build files

Let's firstly clone the Ultra96-PYNQ Github repo with the build files.

$ git clone https://github.com/Avnet/Ultra96-PYNQ

Look inside the folder, you will notice that it contains both build files for the original Ultra96 and the Ultra96-V2.

$ cd Ultra96-PYNQ/Ultra96/sensors96b

These are the Ultra96-V2 files.

$ ls *.v2
sensors96b.bit.v2  sensors96b.hwh.v2  sensors96b.tcl.v2

Since I am compiling for Ultra96-V2, what we are going to do is to copy the version that we want to build.

$ cp sensors96b.bit.v2  sensors96b.bit
$ cp sensors96b.hwh.v2  sensors96b.hwh
$ cp sensors96b.tcl.v2  sensors96b.tcl

After which, your directory should look like this.

Now in this folder, we need to edit sensors96b.tcl to allow it to be compiled in Vivado 2020.1 instead. Find the following line and change it to 2020.1

set scripts_vivado_version 2020.1

Make the Vivado project

Now we are ready to call the Makefile and make the Vivado project.

Source the Xilinx settings from your Vivado directory.

$ source /opt/Xilinx/Vivado/2020.1/settings64.sh

Next, we make the Vivado project.

$ make block_design

Alternatively, you can call make all which will also make the bitstream too. However, since I will be making the bitstream in Vivado, I'll skip it and just make block_design.

Once it is done, there will be a new directory created called <sensors96b>. It contains a Vivado project with the extension .xpr

Open the Vivado project

You can start Vivado from the command line by calling...

$ vivado &

Here, we can open the project by going to File > Project > Open.

Find the .xpr file and click on OK

.Once ready, you see the design source call sensors96b.

We need to add a constraints. Click on the "+" symbol under Sources. Then add the constraints file in <sensors96b/vivado/constraints/sensors96b.xdc>

Once done, double click on the design source and you can see the block diagram.

This is the block diagram.

From here at the sidebar, we can Generate Bitstream.

The process should take around 30 to 60 mins. You should see a base.bit in the directory once done!

For reference, it will be good to take a look at these resources

• https://ultra96-pynq.readthedocs.io/en/latest/sensors96b_overlay.html
• https://discuss.pynq.io/t/tutorial-rebuilding-the-pynq-base-overlay/61