Published September 15, 2021 © GPL3+

Writing Embedded C Applications for the ZynqberryZero

This project focuses on how to write embedded C applications for the ZynqberryZero using Vitis.

BeginnerFull instructions provided1 hour1,622

Writing Embedded C Applications for the ZynqberryZero

Things used in this project

Hardware components

Trenz Electronic ZynqberryZero

USB-A to Micro-USB Cable

Software apps and online services

AMD Vitis Unified Software Platform

Story

Continuing on with my bring up of the ZynqberryZero FPGA development board, I think it's import to follow up the base hardware design with a simple embedded C application running on the ARM-core processor of the Zynq-7000 SoC of the ZynqberryZero.

While it is possible to flash a bitstream onto the ZynqberryZero that contains a pure HDL design running in the programmable logic, I personally don't think it makes a lot of sense to do that on any FPGA board equipped with an SoC like the Zynq or ZynqMP family of chips.

(For context, I'm defining a SoC or System on a Chip here as any FPGA that has a physical processor built into its programmable logic.Andall specific parts/chip families mentioned are Xilinx, but the general concepts apply to any manufacturers.)

Aside from the obvious reason that it's-there-so-why-not-use-it, there are a couple of reasons that you should be running something on the physical ARM-core processor that's built into the Zynq chips:

1. Cost

2. Power draw

Zynq block diagram of ARM-cores built into its programmable logic.

Zynq FPGAs draw more power and cost more than their purely programmable logic counterparts such as the Artix or Kintex chips. So it really doesn't make sense to go with the Zynq and not run an embedded application on the ARM-core directly (like I'll be doing in this project) or an OS such as embedded Linux or RTOS.

In my last project post with the ZynqberryZero, I covered how to setup the base hardware design in Vivado. For those not familiar, Vitis is the partner IDE to Vivado for Xilinx chips that is used to develop the software to run on any processor in the FPGA hardware (whether that be the physical ARM-core of the Zynq or a soft processor instantiated in the programmable logic like the MicroBlaze). This Vivado project and the resultant hardware package exported in the final steps of that project are what I'm starting with to base this Vitis project on. There are two ways to launch Vitis:

1. From Vivado by selecting Tools > Launch Vitis

2. From the command line in Ubuntu:

~$ source /<Vitis install path>/2019.2/settings64.sh
~$ vitis

The launch screen for Vitis will ask for a workspace directory, since this is a new project, click Browse then navigate to the desired directory where the workspace will live. I personally like to use the top level folder of the Vivado project that the hardware design for the Vitis project is coming from, and create a folder titled vitis_workspace within that directory:

Once I create the vitis_workspace directory, I navigate into it and click OK. This returns to the Vitis launch screen with confirms the selected workspace path.

1 / 2

After clicking Launch, Vitis will load into a new blank workspace:

Create a new platform project by selecting Create Platform Project from the blank workspace page.

1 / 4

Notice when the platform project is created it is out-of-date since it hasn't been compiled yet. Before moving on to create the application project from the embedded C application, build the platform project with Ctrl+B.

With the platform project compiled, create a new application project by clicking the New icon and selecting Application Project...

Give the project the desired name and leave the default option to create a new system project with it. As you click through the setup windows for the application project, be sure to select the custom platform created by the platform project done in the previous steps, the target processor core in the ARM to run the application on, you desired programming language, and the appropriate application template.

1 / 4 • Give the desired application name and select Create New for the System project.

I'm writing this application in C and I selected the Hello World application template.

Now that the application project has been created, it's time to actually start writing some code. I wanted to do something more than a simple print out of "Hello World" via the UART serial terminal, but without needing to add any extra hardware. So I decided on a simply character echo from the UART.

My embedded C application starts by setting the control register for the Zynq's built-in UART and enabling the transmit and receive buffers of the UART by writing the appropriate bit masks to the control register.

Then in a while loop that is exited when it sees the ASCII character for escape, the control register bit is polled to see if there is anything in the FIFO of the receive buffer. If there is, it reads that character in, copies it into the transmit buffer, and sends it back out to the UART serial console.

After writing the C code and saving the file, build the application project by right-clicking on it in the Explorer window and selecting Build Project.

Plug in the ZynqberryZero to your PC with a Micro-USB cable. The JTAG/UART USB port is the one nearest to the corner of the board:

Next, program the bitstream onto FPGA. Again, right-click on the application project in the Explorer window and select Program FPGA. Since we selected Program FPGA from the application project, all of the fields in the window that pops up are auto-filled to the appropriate values, so you can simply click Program.

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Launch a debug run of the application after the FPGA is successfully programmed. Right-click on the application project in the Explorer window and select Debug As > Launch on Hardware (Single Application Debug). Vitis will automatically switch the entire window to the Debug view and set a break-point at the first line within the main function.

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To send characters to the UART of the Zynqberry and see them echoed back, a serial terminal application needs to be connected to the serial port created by the little board. You can use any serial terminal you like, but there is a built-in one in Vitis which is what I like to use just to keep things simple. If it's not already a tab open in the bottom window of the Debug view in Vitis, you can open it by selecting Window > Show View then search for/select Vitis Serial Terminal.

Connect to the serial terminal with a baud rate of 115200 (standard Zynq UART baud).

Step through code (F6) or let it run (F8) as you type characters into the serial terminal for it to process.

As you'll see, each character is pulled from the receive buffer and echoed back out. This project tutorial serves to demonstrate the overall process for creating a Vitis project for a bare-metal embedded application and how to debug it. Since permanently flashing a bitstream onto an FPGA is a little more dependent on each specific FPGA development board, I'll save that for another tutorial.

Code

UART Echo Example

/******************************************************************************
*
* Copyright (C) 2009 - 2014 Xilinx, Inc.  All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* XILINX  BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/

/*
 * helloworld.c: simple test application
 *
 * This application configures UART 16550 to baud rate 9600.
 * PS7 UART (Zynq) is not initialized by this application, since
 * bootrom/bsp configures it to baud rate 115200
 *
 * ------------------------------------------------
 * | UART TYPE   BAUD RATE                        |
 * ------------------------------------------------
 *   uartns550   9600
 *   uartlite    Configurable only in HW design
 *   ps7_uart    115200 (configured by bootrom/bsp)
 */

#include <stdio.h>
#include "xstatus.h"
#include "platform.h"
#include "xil_types.h"
#include "xil_assert.h"
#include "xuartps_hw.h"
#include "xil_printf.h"
#include "xparameters.h"

#define UART_BASEADDR		XPAR_XUARTPS_0_BASEADDR
#define UART_CLOCK_HZ		XPAR_XUARTPS_0_CLOCK_HZ
#define UART_BUFFER_SIZE	16

#define CHAR_ESC		    0x1b	/* 'ESC' character is used as terminator */
#define CHAR_NULL           0x00
#define CHAR_ENTER          0x0d
#define CHAR_SPACE          0x20

u8 TxBuffer[UART_BUFFER_SIZE];
u8 RxBuffer[UART_BUFFER_SIZE];


int main()
{
    init_platform();

    u8 RXbyte;
    u8 TXbyte;
    int Running = 0;

    u32 CntrlRegister = XUartPs_ReadReg(UART_BASEADDR,XUARTPS_FIFO_OFFSET);

    /* Enable TX and RX for the device */
    XUartPs_WriteReg(UART_BASEADDR, XUARTPS_CR_OFFSET,((CntrlRegister & ~XUARTPS_CR_EN_DIS_MASK) | XUARTPS_CR_TX_EN | XUARTPS_CR_RX_EN));

    while(Running == 0){
        /* Listen for data to come in */
        while (!XUartPs_IsReceiveData(UART_BASEADDR)){

        };

        /* receive */
        RXbyte = XUartPs_ReadReg(UART_BASEADDR,XUARTPS_FIFO_OFFSET);
        TXbyte = RXbyte;

        if (RXbyte == CHAR_ESC){
        	Running = 1;
        }

        /* send */
        XUartPs_WriteReg(UART_BASEADDR,XUARTPS_FIFO_OFFSET,TXbyte);
    }

    xil_printf("Good-bye!\r\n");

    cleanup_platform();
    return 0;
}

Credits

Whitney Knitter

157 projects • 1588 followers

All thoughts/opinions are my own and do not reflect those of any company/entity I currently/previously associate with.

Writing Embedded C Applications for the ZynqberryZero

Things used in this project

Hardware components

Software apps and online services

Story

Schematics

ZynqberryZero Schematic

Code

UART Echo Example

Credits

Whitney Knitter

Comments

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Writing Embedded C Applications for the ZynqberryZero

Writing Embedded C Applications for the ZynqberryZero

Things used in this project

Hardware components

Software apps and online services

Story

Schematics

ZynqberryZero Schematic

Code

UART Echo Example

Credits

Whitney Knitter

Comments

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