Jacob Seal
Published © GPL3+

Electronic Dice on FPGA

Easily instantiate-able 6 sided dice for FPGA written in VHDL. Can be instantiated with clock divider for multiple instantiations.

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Electronic Dice on FPGA

Things used in this project

Hardware components

Nandland.com GoBoard
×1

Story

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Code

Github

https://github.com/jacob-seal/electronic_dice-FPGA

Credits

Jacob Seal
2 projects • 4 followers
I am a newly hired FPGA Engineer working in Munich, Germany. I am learning on the job with my first FPGA projects.

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