Running Hello World Program on MicroBlaze-V using Zybo 7000

This is a tutorial on how to get a Hello World program working on a MicroBlaze-V Softcore using the Zybo 7000 Board. We want to leverage both the Programmable System (PS) and the programmable Logic into one Hardware Design, as the PL side of the Zynq SOC has no direct access to the peripherals such as UART and DDR, which we can use to our advantage for the MicroBlaze-V. This is the first part of a few tutorials; In this part we will be using the UART on the PS to print hello world to a serial console. In other tutorials we will update the design to include things such as DDR memory for increased memory, and embedded Linux on the PS using PetaLinux.

Hardware Development in Vivado 2025.2

Step 1: Create Project in Vivado

Before we create our project, we want to ensure that we have the board files for our board, In Vivado 2025.2, they are not included by default so we have to add these files to our board repository, first we will create a folder somewhere on our drive, (e.g. Documents/Vivado) to store these board files, the easiest place to find the board files for most Digilent boards would be this GitHub repository. We can clone this repo into our Vivado folder like this using git:

git clone https://github.com/Digilent/vivado-boards.git

Once the repository has been added, we want to open up the settings page in Vivado located in the tools top bar, and navigate to ‘Vivado Store’ section and click board repositories, from there we will add the git folder.

Once the board files have been added, we can continue to create the project.

Note: Ensure name of path is not too long as this can have issues in both Vivado and Vitis, the best approach to take would be is to have separate Vivado and Vitis workspaces on the root of a drive (D:/Vivado).

Click next to then select project type, we are going to make an RTL project, ensure that 'Project is an Extensible Vitis Platform’ is unticked, otherwise the debug options in Vitis will be disabled for this project.

Click next to select the Default Part, we have a choose between adding the chip on our board or selecting the board itself, we will use the board file we added. Click on the boards tab and search up ‘Zybo’ and select the Zybo option.

Click next and then hit finish. The project will then be created.

Step 2: Create Block Design

To add block design, click Flow Navigator -> IP Integrator -> Create Block Design, on the left side bar. We will add both the Microblaze-V and the Zynq7 Processing system IPs by clicking the plus icon in the block design window.

A green banner will appear with 'Run Block Automation, we will select the Zynq IP first and select the default settings, The MicroBlaze-V will then be selected here we are going to set up the MicroBlaze like the following:

I have set the cache to None for simplicity, since all program data for the Microblaze can be saved in BRAM, since we are just doing a Hello World Function. You can choose any BRAM amount you want, for this tutorial I went with 32KB.

We know need to set up our Zynq Processor to enable a general-purpose slave AXI port for our Microblaze to interact with. To do this, double click the Zynq IP block, select the Ps-Pl configuration section and enable a slave port, while we are here, we will also disable the master port since we don’t need it.Also make sure in the Peripheral I/O pins section, that UART 1 is enabled.

With our Zynq and MicroBlaze set up, we know what to bridge the Cores together, this will give the MicroBlaze access to UART. To do this will use the ‘Smart Connect’ IP block.Once added to the block design, we want to double click the Smart connect IP and ensure that one slave interface and one master interface is configured.

We know what to connect the M_AXI_DP port from the MicroBlaze-V to the S00_AXI of the smart connect, and the M00_AXI of the smart connect to the S_AXI__GP0 pin. Connection automation can then be run from the green banner to connect the clocks and reset pins together. You might have to connect the arrest_n pin of the smart connect to the peripheral reset_n pin of the processor reset IP that would have auto generated when configuring the MicroBlaze-V. The hardware design should now look like this:

Step 3: Assign Addresses

We now want to ensure that the address for our slave segments is set up properly so that we can read them properly for our software configuration. This should be set up correctly by default.

Since we are not using DDR memory or QSPI in this tutorial, we will exclude these segments from our design.

We can now click the validate design button (F6) to check if your design is valid, if you have any ports that are unassigned, they can be auto assigned now. Note: With the Zybo 7000 board, you might get warnings about DDR clock values being negatively skewed, these can be safely ignored for the applications of these tutorials but might be something to keep in mind.

We can now click the validate design button (F6) to check if your design is valid, if you have any ports that are unassigned, they can be auto assigned now. Note: With the Zybo 7000 board, you might get warnings about DDR clock values being negatively skewed, these can be safely ignored for the applications of these tutorials but might be something to keep in mind.

Step 4: Generate Bitstream and Export Hardware

Now that the block design is complete and addresses assigned, we can generate the hardware design file to be used in Vitis for our software configuration.

First, we have to right-click in the sources tree and click create HDL Wrapper. We then let Vivado manage our wrapper.

We then click Generate Bitstream on the flow navigator, we then just click ok

Once the bitstream is generated, we can export the hardware by clicking File -> Export -> Export Hardware. Go through the steps to export the hardware, make sure to select ‘Include bitstream/binary’ when going through the export.

You should get an exported file with the ‘.xsa’ file extension name, this is the file we will be using to write our hello world program in Vitis.

Software Development in Vitis 2025.2

Step 2: Set Workspace

When we open Vitis, we start by setting the workspace to work on the exported hardware design. We do this by clicking on the ‘Set Workspace’ link on the Vitis homepage. We will create a folder in our Vitis folder and call it our Project Name (Vitis/ZyboMicroBlazeV). This will be our Workspace.

Step 3: Create Platform

Now with our workspace set, we will start by creating our platform. We do this clicking on Create Platform component in the Vitis Explorer.

When you get to the Select Platform Creation Flow, we will select the xsa file from our Vivado Project

We will select the MicroBlaze-V as our processor and standalone as our OS.

Once the platform has been created, we will build the platform to generate our source files.

Create Application

We will know create the Hello World Application by using the hello world example provided to us in Vitis IDE. We do this by the Examples link on the Homepage (Figure 13) and Selecting Hello World.

Go through the steps to create an application, choose the platform we just created as our hardware, Select ‘standalone_microblaze_riscv_0’ as the domain.

Running Hello World on Board

With the program ready, we can now plug in our board, and open a serial monitor to the board, can use the built in Vitis Serial Console or an external Program (Putty).

We can now build our platform, and when its finished building, we can click the run button, and this should program our board with our hardware and print hello world to the serial monitor.

With our MicroBlaze-V successfully set up to run software, we will look at setting up the DDR Memory in the Next Tutorial and running a Software Implementation of SHA-256 using a message stored in the DDR.