Ninad Waingankar
Published

Hexadecimal counter on FPGA

Hexadecimal counter (0 to F) on Xilinx Spartan 6 FPGA. Counter is displayed on common anode 7 segment display with FPGA implemented VHDL.

IntermediateFull instructions provided1 hour766
Hexadecimal counter on FPGA

Things used in this project

Hardware components

MINI_SP6-SPARTAN 6 FPGA DEVELOPMENT BOARD
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common anode 7 segment display
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Male/Female Jumper Wires
Male/Female Jumper Wires
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Breadboard (generic)
Breadboard (generic)
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Software apps and online services

Xilinx Software Development Kit
AMD Xilinx Software Development Kit
Xilinx ISE 14.07 design suite (webpack edition)

Story

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Schematics

Hexadecimal counter on FPGA

Code

Hexadecimal counter on FPGA

Assign user IO ports on FPGA using .ucf file. Use VHDL file to generate .bit file and burn on FPGA using Xilinx ISE 14.07.

Credits

Ninad Waingankar
11 projects • 21 followers
Robotics Embedded Systems Microcontrollers VLSI Designer FPGA Designer IOT

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Related channels and tags
  • AMD
  • Displays
  • Displays
  • FPGAs
  • FPGAs