Video Processing with Digilent FMC-HDMI Module - Part 1

Overview

Many vendors mostly make the HDMI FMC Module with input and output functionality, for example, if you look into the Avnet FMC HDMI module, it has Input HDMI and Output HDMI interfaces.

However, the FMC HDMI Module, made by Digilent, is a little bit different and is really fantastic.

This module becomes a really excellent solution when you need more than one image/video capturing interface, for example, HDMI input interfaces in your design.

This FMC module is very user-friendly. It hides the underlying interface complexity. We can easily integrate into our FPGA-based Computer Vision designs.

The module has two different HDMI input interfaces, so it can fit anywhere between start-up and industrial designs.

Interface description

The above picture shows the basic block diagrammatic view of FMC module. The interfaces use HDMI Type A Female connectors

Even though both the ports are HDMI Input, they use different HDMI Standards. That’s why, based on the user application, their usage will be different. The module has two HDMI input, namely, HDMI1 and HDMI2.

HDMI1

This interface implements the HDMI 1.4a standard. Because it uses the widely known Analog Device ADV7611 HDMI Receiver IC, which supports HDMI 1.4a features.

The receiver IC decodes the TMDS signals into parallel video up to 24-bit YUV444 video format. The IC is capable of supporting single data rate (SDR) and double data rate (DDR) modes. In this Digilent FMC module, the IC is configured in DDR mode. That’s why it can give 24-bit RGB444 video output. So, our FPGA video pipelines become a little simpler.

A few highlighting features of ADV7611 are

• UXGA 60Hz at 8bit. That is, it supports video resolution up to 1600x1200 with 8 bit per component.
• CEC(Consumer Electronic Control)
• Audio Interface
• HDCP 1.4 Protocol
• 162.5MHz maximum TMDS clock frequency
• Cable length supported up to 30m
• Internal EDID RAM
• HPA (Hot Plug Assert) Output
• Programmable by IIC. That is, IC can be configured through IIC protocol

For more information, you better follow the IC datasheet here

The signals after ADV7611 run through two 74AVCH16T245DGG ICs, which are voltage-level translation ICs. These are bidirectional, which can do voltage translation between any of the following voltages: 0.8V, 1.2V, 1.5V, 1.8V, 2.5V and 3.3V. The required voltage level is set through VADJ.

In the case of FPGA designs, the most preferred voltage levels are 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V. We have to set the required voltage standard through the pin constraints.

With the appropriate programming through IIC to ADV7611 IC and proper pin mapping, the input HDMI signal will be able to get into the FPGA through the FMC connector.

The above picture shows the PCB schematics of the HDMI 1 Interface

HDMI2

This interface is a little bit less complex than the HDMI1 interface, because, it does not have any HDMI receiver ICs, instead of which, Analog Device HDMI buffer IC, AD8195, is used. That’s why HDMI2 is HDMI 1.3a compliant.

The IC does not do any kind of conversion or decoding. Rather, it takes the TMDS signal and generates the pre-emphasized TMDS signal output. In simpler words, you can understand it as a signal regenerator, which increases the amplitude of incoming TMDS signal frequency so that the receiver can receive the signal without the loss of the data. Therefore, such an HDMI interface is very applicable in that places where a long HDMI cable is used without signal conversion requirements.

Apart from these, the IC also has features, for example, Bidirectional buffered DDD lines, and bidirectional buffered CEC lines. For more information, let’s visit the datasheet here. In the case of Digilent HDMI2 interface, the FMC module has pre-programmed EEPROM onboard for the EDID. Users can also reprogram it through the J4 header holes and 6-pin Pmod cable.

FMC Pin Description

The FMC module is built with VITA 57.1 HPC Male connector to easily integrate with several FPGA boards. Even though the module has an HPC connector, only the LPC pins have been used. As the LPC is the subset of HPC, it can easily be used with both LPC and HPC FMC FPGA Boards.

The above picture illustrates the FMC pin description of the Digilent FMC HDMI module for the ZedBoard FMC Connector. By the way, this is not only valid for zedboard, but also for those FPGA boards which have HPC FMC connectors with them. Such a pin description helps us to write the FPGA constraints more precisely.

The orange-colored pins, in the above description, represent the HDMI1 interface pins and the Green Colored pins represent the HDMI2 interface pins.

Integrating the FMC module into the FPGA-based design

Once we have all the detailed information on the FMC module, now, let’s talk about how exactly we can use such a module in any FPGA design.

However, there can be one limitation in using HDMI in UltraScale/+ and 7-Series FPGAs. Because, if you notice in the above sections, both HDMIs use different HDMI Standards. HDMI1 interface can easily be integrated with UltraScale/+ as well as 7-Series FPGAs. Because this interface has all the signals Single-Ended. HDMI2 uses Differential Signalling for HDMI data and Clock. HDMI2 puts a major limitation in that it requires VADJ to be 3.3V to work properly. Mostly, 7-Series FPGAs support such a voltage. So, there is no problem with them. On the contrary, most UltraScale/+ FPGAs use a voltage level of up to 1.8V. So, unfortunately, HDMI2 has no luck with these FPGAs.

The FPGA design takes place in the hardware design and the software design.

In hardware design, we create Vivado Block design, where we include two HDMI-capturing pipelines. As HDMI interfaces are different, there will be different pipeline designs, for example, the HDMI1 capture pipeline will have parallel video data processing pipelines. As the HDMI2 interface generates the pre-emphasized TMDS signals, the FPGA capture pipeline will need a decoder IP, which will decode the TMDS signals into parallel video signals inside the FPGA logic. You might be already familiar with the Digilent DVI2RGB IP, which can be used for HDMI2 capture pipeline design. Instead of such IP, user can also have their own IP here to decode TMDS signal into parallel video.

Finally, we also need to write physical pin constraints to receive the signal through the FMC connector into FPGA. We can utilize the FMC Pin description to generate the constraints.

On the software side, a standalone app or Linux app can be created in such a way that can initialize and configure the individual capture video pipelines including proper resetting and the programming of ADV7611 IC.

During this project, I will use ZedBoard to demonstrate both HDMI1 and HDMI2 Input capability. However, you can use other FPGA boards. The fundamental design steps will be exactly the same except few things, such as the VADJ setting, FMC pin constraint writing, and so on.

Demonstration

You can find here the demonstration of the Digilent FMC HDMI Module interfacing with the FPGA design.

What’s next?

Up to here, under Part 1, I have given you a brief overview of the Digilent FMC HDMI module in order to successfully integrate it into the FPGA design.

Apart from this, you can check the below link to get even more information on this module.

• Digilent FMC HDMI Resources

Next time, I will add Part 2 and Part 3 of this topic. Part 2 will cover the detailed hardware design in the vivado to design a dual HDMI input capture pipeline. Part 3 will cover the software design to properly initialize and configure the hardware . However, you check the demonstration as mentioned in previous section of this article.

Thanks for your support. Stay Tuned!

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