MicroZed Chronicles: Vitis SW Platform

How to create the software element of the Ultra96 V2 Vitis acceleration platform.

Last week, we started looking at platform creation for Vitis so we can accelerate algorithms from the processing system to programmable logic.

Creating a platform requires two elements: the hardware element we created last week and a software element we are going to create now.

To get started with the software element, we first need to have PetaLinux 2019.2 installed on our Linux system.

Before we can install PetaLinux, we need to ensure we have necessary prerequisites. For the VM we created a few weeks ago, we can install them using the command:

sudo apt-get install -y gcc git make net-tools libncurses5-dev tftpd zlib1g-dev libssl-dev flex bison libselinux1 gnupg wget diffstat chrpath socat xterm autoconf libtool tar unzip texinfo zlib1g-dev gcc-multilib build-essential libsdl1.2-dev libglib2.0-dev zlib1g:i386 screen pax gzip gawk

Once the required packages have been installed, we can download and install PetaLinux.

With PetaLinux available under the directory, we created for the platform previously we need to create three new directories PFM, WKSP1 and BOOT.

cd ultra96_min_pkg
mkdir pfm
cd pfm
mkdir wksp1
mkdir boot
cd ..

In the same terminal window, we need to source the following files:

  • <Vitis Install path>/settings64.sh
  • <PetaLinux Install path>/settings.sh

We are now ready to create the PetaLinux project. Make sure the project name is the same as the hardware in this case ultra96_min.

petalinux-create -t project --template zynqMP -n ultra96_min

We then need to configure the new project for the hardware design using the command:

cd ultra96_min
petalinux-config --get-hw-description=../vivado

This will open a configuration dialog, set the boot arg to

earlycon clk_ignore_unused root=/dev/ram rw

and stdin/stdout to pus_uart_1.

Once this is completed, save the changes and exit the dialog.

We need to make some changes to the meta-user Yocto layer, under the directory:

<project>/project-spec/meta-user open the conf file and add in the required OpenCL requirements.

CONFIG_xrt
CONFIG_xrt-dev
CONFIG_zocl
CONFIG_opencl-clhpp-dev
CONFIG_opencl-headers-dev
CONFIG_packagegroup-petalinux-opencv

We also need to make changes to the user device tree, under:

<project>/project-spec/recipes-bsp/device-tree/files

Edit the file system-user.dsti and add in the following:

/include/ "system-conf.dtsi"
/ {
amba {
mmc@ff160000 {
u-boot,dm-pre-reloc;
compatible = "xlnx,zynqmp-8.9a", "arasan,sdhci-8.9a";
status = "okay";
interrupt-parent = <0x4>;
interrupts = <0x0 0x30 0x4>;
reg = <0x0 0xff160000 0x0 0x1000>;
clock-names = "clk_xin", "clk_ahb";
xlnx,device_id = <0x0>;
#stream-id-cells = <0x1>;
iommus = <0xd 0x870>;
power-domains = <0xc 0x27>;
clocks = <0x3 0x36 0x3 0x1f>;
clock-frequency = <0xb2d0529>;
xlnx,mio_bank = <0x0>;
no-1-8-v;
disable-wp;
};
};
};

&amba {
zyxclmm_drm {
compatible = "xlnx,zocl";
status = "okay";
reg = <0x0 0xA0000000 0x0 0x10000>;
};
};

Once these edits have been made, open the rootfs configuration and enable the user packages.

petalinux-config -c rootfs

To be able to use the platform for acceleration, we need to make a few changes to the kernel configuration:

petalinux-config -c kernel

Make the following changes:

  • Device Drivers > Generic Driver Options > DMA Contiguous Memory Allocator > Size in Mega Bytes change the size from 256 to 1024 MB
  • Device Drivers -> Staging drivers -> Xilinx APF Accelerator driver
  • Device Drivers -> Staging drivers -> Xilinx APF Accelerator driver -> Xilinx APF DMA engines support

Once this has been completed, we then ready to build the PetaLinux image.

petalinux-build

Wait until the build completes and we can then create the sysroot, change directory into the <project>/images/linux/directory.

petalinux-build --sdk

We will use this to install the sysroot in the pfm directory run the command:

./sdk.sh

When prompted, enter the full path to the pfm directory.

Finally, copy the following files from the <project>/images/linux directory to the boot directory.

  • image.ub
  • zynqmp_fsbl.elf
  • pmufw.elf
  • bl31.elf
  • u-boot.elf

We also need to create a linux.bif file under the boot directory this should contain the following.

/* linux */
the_ROM_image:
{
[fsbl_config] a53_x64
[bootloader] <zynqmp_fsbl.elf>
[pmufw_image] <pmufw.elf>
[destination_device=pl] <bitstream>
[destination_cpu=a53-0, exception_level=el-3, trustzone] <bl31.elf>
[destination_cpu=a53-0, exception_level=el-2] <u-boot.elf>
}

With all of this completed, we are now in a position to open Vitis and begin to create the platform. From within the pfm directory, run the following commands:

vitis -workspace wksp1

This will open the Vitis GUI. From under the project column, select Create Platform Project.

This will open a new platform project dialog, enter the project name and click next.

On the next dialog, select the create from hardware specification.

On the next dialog, select the XSA which is under the Vivado directory.

Select the operating system as Linux and Processor as the PSU_Cortexta53.

Completing the dialog will open a platform project in Vitis. To be able to build the application, we need to provide the location of the BIF, boot directory, Linux image and sysroot — all of which are available under the PFM directory.

With the information provided, we can build the application project. This might take a minute or two.

Of course, to test the platform we need to create a test application, select new application project and from the available platforms you should be able to see the newly created Ultra96_min project. This project should be defined as being available for embedded and acceleration flow.

For the application, select the demo example, change the target to hardware, and build the application.

This took about 30 minutes on my system.

We now have a platform which we can use to accelerate our OpenCL applications on for the Ultra96 V2.

See My FPGA / SoC Projects: Adam Taylor on Hackster.io

Get the Code: ATaylorCEngFIET (Adam Taylor)

Access the MicroZed Chronicles Archives with over 300 articles on the FPGA / Zynq / Zynq MpSoC updated weekly at MicroZed Chronicles.

Adam Taylor
Adam Taylor is an expert in design and development of embedded systems and FPGA’s for several end applications (Space, Defense, Automotive)
Related articles
Sponsored articles
Related articles