Evan Allen's FPGA-Based Logic Chip Tester Compares Actual Outputs to a Verilog Simulation

Maker Evan Allen has built a tool for debugging classic 74- and 40-series transistor-transistor logic (TTL) chips without having to remove them from a circuit — by hooking them up to a field-programmable gate array (FPGA) and comparing their responses to a Verilog simulation of the same part.

"This project is intended to allow for the in-circuit testing of 74xx and 40xx style logic chips," Allen explains of the effort, brought to our attention by Adafruit. "We do that by sampling all the pins of a given chip (inputs and outputs) and compare the behavior of the real chip to one that we model in Verilog. This lets the circuit operate normally, wiggling the input pins and we can track those changes and compare them to the chip’s output pins."

The hardware is a combination of an AMD Xilinx Spartan 6 FPGA on a Mojo V3 development board and an add-on shield which offers 64 pins of bidirectional 5V-tolerant input/output (IO) — allowing it to safely communicate with the 5V TTL logic chips which are the target of a test. Once wired into the circuit hosting the chip to be tested, the FPGA analyses the responses it receives and compares them to an ideal simulation of the same part written in the Verilog hardware description language (HDL).

"The output from this model is a signal that represents a discrepancy between the model and the actual chip," Allen explains. "In the case of a good chip that represents the propagation delay, for a bad chip that would differ from the correct signal for quite some more time than a few clock cycles. That difference signal is fed into the counter function that counts up and if any one of the channels is consistently off by more than a few clock cycles in a row it latches a flag output. Those flags are wired to the LEDs on the Mojo board. The debug pins are assigned to the difference signals so we can see exactly how much the signal from our real chip differs from the model."

The comparison can highlight when there's a problem — but, Allen admits, it can't always track down exactly where. "We can get an idea of whether a chip is bad," he explains, "but the chip under test is not necessarily causing the issue, it’s possible that something on the same net as the output pin is interfering with the signal. Hopefully I’ll be able to build up a series of models and clip right on to a running system to get an idea of whether there’s any reason to desolder and check a given chip out of circuit."

Allen's full write-up is available on his blog, with source code published to GitHub under the permissive MIT license. The bidirectional 5V shield for the Mojo V3 development board, meanwhile, is available on PCBWay.