FPGA watch

This is a watch generating sec, min, and hour tic and showing them on tcl console thorugh vits.

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Things used in this project

AMD Vitis Unified Software Platform

I did this project to build up my basic knowledge of counter after skimming through the project, "Matbi Watch".

The result seems to be different since I implemented my own code.

1. buildclock using AXI4_lite protocol

2. toggle led when sec, min or hour change

3. accelerate/deaccelerate timer by inserting desired counter frequency

4. display time at tcl consol through vitis

This demonstares an architecture that I implemented and few objects of the HW.

Summary:

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