Pedro Fabián Owono Ondo Mangue
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VLSI lab and Assignment

I designed a VHDL-based digital counter optimized for power efficiency and modularity.

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VLSI lab and Assignment

Things used in this project

Software apps and online services

Demultiplexer (1x8)
Full Adders
Full Subtractors
SR and JK Flip-Flops
4-bit Binary to Gray Code Converter
Seven-segment displays for visual output of the counter.
Quartus Prime: Used for VHDL coding and simulation of digital circuits.
VHDL: Hardware Description Language for describing digital and sequential circuits.

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Schematics

VLSI (Very-Large-Scale Integration) design

Credits

Pedro Fabián Owono Ondo Mangue
23 projects • 3 followers
Fresh Graduate (B.Eng. Computer Engineering) | AI & Software Development

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