Xilinx recently announced a new edition of FPGA chips to their UltraScale+ lineup. These new Zynq-based and Artix-based UltraScale+ chips rival their counterparts with 70% smaller form factors optimized for higher I/O bandwidth, DSP computation, power efficiency, and overall cost.
This is a big deal given the rise of edge computing and more compact applications such as wearable medical devices, automotive sensors (think of the collision warning sensors you see in the bumpers of newer vehicles), and so on. Edge computing is all about offloading server end hardware by performing more data processing in-situ on the client end. Thus, current demands for edge computing can be boiled down mainly to getting as much compute power packed into the smallest footprint possible.
Xilinx's UltraScale+ chips accomplish this demand with their implementation of 16 nanometer technology using TSMC’s Integrated Fan-Out wafer level packaging (InFO). InFO is a novel method of forming the geometry of an integrated chip's (IC) package to optimize aspects of it such as the amount of space it consumes, shortening pathways to increase the signal speed achievable, and reducing the amount of power the IC consumes.
The Artix line of these new UltraScale+ chips are optimized with 16 gigabits-per-second transceivers making them ideal for DSP computation heavy designs. Their Zynq-based sibling line implement the ZU1 - ZU3 devices packaged with the new InFO packaging to optimize them for cost, footprint, and power.
Another key feature of these smaller packages is that they still maintain the same level of security that their original full-sized package counterparts do. This includes Xilinx’s proprietary Security Monitor IP, AES-CGM decryption, DPA countermeasures, and RSA-4096 authentication.
As an FPGA engineer and dare I say enthusiast? I'm excited that this new chipset announcement probably means that there are some awesome new development boards for them on the way. I would imagine their form factor would be miniaturized as well?
Considering their target applications, I'm excited to see how the Artix-based UltraScale+ FPGA can change the game for software defined radios, particularly for handheld radios given the reduced power consumption and increased DSP computation capabilities. We'll see when they hit the marker later this year!