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Wenting Zhang's Sitina 1 Is a Fully Open Source FPGA-Powered Full-Frame Mirrorless Digital Camera

If nothing off-the-shelf takes your fancy, Zhang's Sitina 1 delivers a customizable, open source full-frame photography platform.

Engineer Wenting Zhang has designed a permissively-licensed FPGA-powered open source full-frame 35mm digital camera, the Sitina 1 — after a project to build a digital back for film camera bodies got a little out of hand.

"Sitina 1 [is an] open source 35mm full-frame (36×24mm) CCD mirrorless interchangable-lens camera (MILC)," Zhang explains of his impressive creation. "The original goal of this project was to create a digital camera back to convert SLR [Single-Lens Reflex] cameras to DSLR [Digital Single-Lens Reflex] cameras, but has since changed to build a full MILC. Hardware [revision] R0.11 tested and working.

If you're looking for an eye-catching camera, the Sitina 1 is a build-it-yourself FPGA-powered open-hardware marvel. (📹: Wenting Zhang)

The impressively compact camera is built around an AMD-Xilinx Zynq 7010 system-on-chip, which combines a pair of Arm Cortex-A9 CPU cores running at 667MHz with an FPGA featuring 28k logic cells. There's 512MB of DDR3 RAM, an Analog Devices AD9990 signal processor and analog front-end connected to a Kodak/ON Semi KAI-11002CM color or KAI-11002M monochrome image sensor, with a 3.4" 480x480 ISP panel at the rear for a user interface controlled via a grip to the right of the sensor.

The sensor delivers up to 10.7 megapixel full-frame images, with lower-resolution crop options available down to 5.6 megapixel APS-C square-format shots. Images are output as losslessly-compressed raw DNG files and JPEG images, while the display at the rear runs at 28 frames per second for the the live-view mode.

The latest hardware revision, the result of a year's further development, offers some major improvements. (📹: Wenting Zhang)

In other words Zhang has designed a perfectly decent camera, but with a twist: everything about the design is open, with the firmware and gateware released under the permissive MIT license and the hardware under the permissive version of the CERN Open Hardware License Version 2. Anyone suitably skilled can take those sources and build their own — though, Zhang admits, "the hardware still need[s] a lot of work and is not ready yet."

More information is available, along with the project's source files, in Zhang's GitLab repository.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire: freelance@halfacree.co.uk.
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