Trammell Hudson's Pixel Wrangler Aims to Adapt HDMI to Everything From CRTs and LEDs to Servo Motors
Taking basic HDMI video in at one end, this gadget turns it into almost anything you could desire.
Maker Trammell Hudson has designed a gadget that aims to turn almost anything — from vintage monitors to servo matrices — into HDMI-compatible display devices: the Pixel Wrangler, inspired by the UPduino v3.
"The Pixel Wrangler is a tool for converting HDMI video into anything else," Hudson explains of his compact creation. "It uses a [Lattice Semi] ICE40UP5k FPGA to decode the video stream and stores a section of it in the block RAM, which can then be clocked out of the 16 GPIO [General-Purpose Input/Output] pins in any other format required."
The field-programmable gate array (FPGA) at the board's heart is the key to its flexibility. Where a traditional adapter board may take HDMI in at one end and convert it to a pre-set output type, like composite or VGA, at the other, the Pixel Wrangler can be tailored to a range of requirements — from the straightforward to the bizarre.
"Since the FPGA has total flexibility in how it drives the output pins it is easily adaptable to different protocols. Some examples that are possible: classic CRT monitors like B&W [Apple] Mac or Hercules monitors," Hudson explains. "LED matrices. Flip dots. LED strips (WS2812 or other protocols). Lots of servos for 'wooden mirrors.'"
Hudson has showcased a range of use-cases for the tool on his Mastodon account, from vector and character displays to classic Apple Macintosh CRTs, the LCD of a TRS-80 Model 100, and a train display screen — with more projects in the pipeline.
The specifications of the ICE40UP5k and its memory do put a few limitations on the device's capabilities, though. It only accepts "baseline" HDMI as its input, meaning 640×480 video at 60Hz, with a 25MHz maximum pixel clock. There's a 1MB framebuffer that provides support for a maximum 1024×1024×1 output resolution, which can also be configured as 512×512×4, 256×256×16, or 256×128×24.
The design files and Verilog source for the project, which has been tested in prototype, are available in Hudson's GitHub repository under an unspecified open source license — likely MIT, to match the UPduino v3 license.