The PinCushion Is a Compute Module 4 Baseboard Featuring an Artix-7 FPGA for Extra I/O Oomph!

With so much recent news of all things Raspberry Pi — especially the launch of the Pico board, based around the Foundation's first own-designed silicon, the RP2040 — it's been a bit much keeping up with the phenomenal pace of project work built around anything even remotely Raspberry Pi-based!

Despite the Pico taking the current spotlight, let's not forget the Compute Module 4, and the plethora of peripheral baseboards that are popping up almost daily.

One of the recent baseboards to catch my eye has been the Raspberry PinCushion, an absolutely ridiculously powerful combination of the Raspberry Pi CM4, alongside an almighty Xilinx Artix-7 FPGA device.

FPGA Fusion

Now, this certainly isn't the first time we've seen an FPGA fused with an SBC.

Previously, we've been able to level-up our Pi-based projects with some loving from Lattice, in the form of such boards as the IceZero, courtesy of Kevin Hubbard from Black Mesa Labs.

Designed to stack on top of the Pi Zero form factor, this "Top Hat"-style board bolstered the somewhat meagre Broadcom SoC on the Pi with some supplementary processing capabilities, supplied by a secondary device on a daughterboard — a Lattice iCE40 FPGA.

Still very much an active product, available from Trenz Electronic, the IceZero is a lovely bit of kit, but it's also just a little bit dated.

That's not a dig, it's still a very capable board, just as we all know, things move really, really fast in this game.

With the latest generation of Pi single board computers offering access to the PCIe transceiver peripheral within the Broadcom SoC, the barrier to blazing fast bus speeds is somewhat blown open.

Whereas the conventional form factor Pi 4 needs a little... "coaxing" to expose the PCIe lanes, replacing the PCIe USB 3.0 controller with a straight-through "chip, "the CM4 makes these lanes directly available on the board-to-board headers of the module. This makes prototyping with PCIe almost child's play!

OK, OK, it's not still not exactly "auto-router" territory board layout, but this is a pretty good place to learn the laws of such lavish LVDS layouts!

The natural evolition of this development in breaking out hte PCIe I/O on the CM4 module, makes for the logical conclusion of seeing just what you can bolt onto that high-speed bus. And with the right parts, the possibilities are pretty awesome.

With that in mind, we present the Raspberry PinCushion, designed by the folks over atBlinkinlabs.

A pin cushion full of pokey, PCIe peripheral-driven I/O!

While the Pi 4 is a hefty chunk of compute power in its own right, bolting an Xilinx Artix-7 (XC7A35T-2FGG484C) onto the CM4's PCIe peripheral bus is a bit of a power move.

The Artix-7 family is — frankly — ferocious FPGAs, with feature sets fit for just about anything you can think of throwing at them.

From great PCIe support, to integrated DSP hardware IP, they are blazing fast, and can even offer integrated analog peripherals — a point of note for an FPGA device!

With the Artix-7 containing a set of GTP transceivers, this family of FPGA devices is perfectly able to establish and more than capable to handle a PCIe link.

All that is needed is to lay out the three pairs of 90Ω impedance matched traces — one pair for each of the Tx, Rx and clock lanes of the PCIe bus.

We can see the lovingly laid out sets of differential traces of the three differential pairs needed for this link, the PICe_TX_P/N, PCIe_RX_P/N and PCIe_CLK_P/N

While PCIe doesn't really care much for the relative length of the individual pairs — the two nets within each pair should be matched as closely as possible — 0.1mm or better, so sayeth the CM4 datasheet!

If you're wondering how one can account for matching the length of two individual nets, most EDA packages will contain a tool to perform an operation called "meandering."

Meandering is the process of "soaking up" the difference in length between two matched length traces. These differences in length can stack up from something as simple as a curve, as can be seen at the lower right of the above image.

As the inside track of the two pairs is of a shorter distance than the parth taken by the outer track, the result is a longer resultant length of the external track.

This is compensated for, by instructing the ECAD tool to make up the difference, by elongating the shorter of the two tracks, by inserting the "waves" seen in the track. These additional detours add in the extra path length needed, such that the two signals arrive perfectly synchronized, the end result being a perfect timing diagram, somewhat resembling a synthwave-style eye of Sauron.

Not only is this PinCushion I/O PCIe fed, there's plenty to go about!

With the PinCushion expansion headers arranged as two, 2x30 banks, that's nearly 120 I/O, most of which appear to be mapped to as many of the useful Artix-7 balls as possible.

This is a pretty impressive routing effort alone, as can be seen by the fairly dense BGA escapement visible on the top copper layer of the stack, seen below.

In fact, the all around routing in this board could likely serve as a textbook reference on high-speed layouts. Let's just for a second take a look at how many high-speed pairs we can see placed on this PCB stack.

You want HDMI? PinCushion has got the hook-up!

We can really see where the Pi Foundation has gone to great lengths to make matching trace lengths as easy as Pi!

With a 1:1, direct pin mapping from the CM4 header to the HDMI socket, there is no need for any layer swapping or transposing of traces.

Short, sweet, and simple. That's always a good thing when it comes to high-speed routing!

Ethernet expansion? Easy!

With the CM4 containing the necessary Ethernet PHY required to drive the physical layer of the Ethernet link, all that is left is to directly track out these connections to a RJ-45 connector jack.

Some might question the lack of visible magnetic coupling, required for interfacing with the Ethernet bus signaling. These days, there are a huge range of RJ-45 jacks with integrated magnetics, allowing you to save on board space, and usually BoM costs — one part in place of two tends to be a touch cheaper.

Craving that crazy fast CSI connection?

With the CM4 interface selection offering, amongst all the other interfaces we've already covered, a 4-lane LVDS interface, with each lane supporting up to 1 Gbit/s data rate, this is a peripheral worth routing out correctly.

We can see the length matched traces extending from the left hand side CM4 header, out and down towards a FPC connector at the bottom edge of the board.

This means that the PinCushion is good to go with any of the camera modules (Foundation official, or otherwise) that are known to work with the Pi4 hardware!

A final point on properly provisioned power domains!

The Pi CM4 has the handy feature of incorporating it's power regulation electronics on-board, making powering the module pretty much a simple DC-in affair.

The Artix? Well, FPGAs are a little more finicky and fickle when it comes to catering for the amount of current they can chug down, across multiple supply domains / rails.

With a need multiple voltage rails, anywhere from 1.0, 1.2, 1.8 and up to 3.3 Volts, all with significant current requirements, the only real way to go about this in a sane fashion is to throw in a slew of switching DC/DC converters.

To that end, we see a triplet of Texas Instruments TPS621361 switching regulators.

Split across three power domains these switching regulators handle three separate power rails, +1V, +1.8V and +3.3V, providing up to 4A on each rail!,

The efficiency of a these switching regulators, over that offered by a LDO is essential when down regulating even a few volts — the current being passed makes the idea of an LDO a horribly inefficient prospect, and would be a thermal nightmare to manage.

For the slightly less demanding domains, we can see some capable LDOs put to good use, with a slew of MIC94325 adjustable regulators from Microchip, good for 500mA!

These devices have a specific feature that makes them very well suited to this design, which the Microchip Marketing folks have called "Ripple Blocker Technology."

Buzzwords aside, the gist is that they are designed to sit on the output of an intermediate DC/DC switching converter, and not only further down-regulate the supplied voltage, but to also do it cleanly, with some features designed to actively suppress any noise and spikes that can sometimes be observed in the output harmonics of a switching regulator.

With the core domains of the FPGA being fed from these supplies, a clean output is critical to correct operation of such a complex device!

Get your paws on a PinCushion!

Blinkinlabs has been kind enough to share the full sources for the PinCushion with us, over on their GitHub project repo page here.

We've yet to see the PinCushion in the flesh, but with the design efforts we've seen documented here, I've got some high hopes that this board will be a solid way to bootstrap any embedded application that needs that special mix of an embedded *nix board, paired with all the potential offered by a ferociously fast FPGA.