Sipeed Teases Tang Nano Sub-$5 FPGA Development Board with On-Board Programmer
1,152 four-input lookup tables (LUT4s), 72Kb static RAM (SRAM), and 64Mb pseudo-static RAM (PSRAM) for less than five bucks.
Embedded computing specialist Sipeed has announced final specifications for an ultra-low-cost field-programmable gate array (FPGA) development board, the Tang Nano, which it claims will cost under $5.
"$3 FPGA Board (debugger on board)," the company posted to its official Twitter account when it first unveiled the part. "Light[s] up the RGB LCD," complete with a picture of the board interfacing with a full-colour liquid-crystal display panel using an on-board display output.
At the time, Sipeed hadn't confirmed full specifications for its ultra-low-cost design, though it did admit to the use of the "cheapest" Gowin Semiconductor 48-pin FPGA — meaning the GW1N-1 LittleBee family, based on a 55nm low-power process node and measuring just 2.4x2.3mm. A picture of the board revealed a WCH CH552 serial-USB chip, a USB Type-C connector for power and data, two push-buttons, the aforementioned display connector, and two rows of 21 breadboard-friendly pin headers plus an additional two pins spaced above the final pins of each row.
Now, the company has revealed a little more about its creation — and in doing so has admitted it may miss its $3 goal, though only just. In a Twitter update Sipeed revealed the first mass-produced models and gave the finalised specifications as offering 1,152 four-input lookup tables (LUT4s), 72Kb static RAM (SRAM), 64Mb pseudo-static RAM (PSRAM), an on-board RGB LED, 40-pin RGB LCD display interface, and on-board programmer with USB Type-C connectivity - and a final price of under $5.
Sipeed has yet, however, to announce commercial availability — aside from a now-missed launch deadline of September. Interested parties should keep an eye on the company's Twitter account for more information.