No License Needed: Xilinx MIPI CSI IP Block Free in Vivado 2020.1

Xilinx's MIPI CSI and DSI Controller IP blocks are now free to use starting in Vivado 2020.1!

Whitney Knitter
4 years agoFPGAs / Displays / Photos & Video

Starting with Vivado release 2020.1, Xilinx has bundled their MIPI CSI controller subsystem IP blocks and MIPI DSI TX controller subsystem IP blocks in with the standard license free for developers to use. Previously, an additional license was required to be purchased to be able to synthesize a design with any of these IP blocks. This is exciting for hobbyists with boards such as the Ultra96 or the ZynqBerry that come equipped with a CSI-2/DSI connector for connecting to a display or camera.

For quick reference, MIPI CSI-2 is a Camera Serial Interface that is widely used and is a simple, high-speed protocol for point to point video and image transmission. It is popular for its balance between ease of use and great performance. MIPI DSI is a Display Serial Interface for creating a high-speed link between a display and a host processor. It is also popular for having the same balance between ease of use and great performance. It is also very cost effective to implement, thus why it was chosen for the Raspberry Pi.

Being a mainstay on the Raspberry Pi means that there are lots of affordable camera and display options utilizing the MIPI CSI/DSI interface that are perfect for use with FPGAs and why you come across this type of connector on hobbyist FPGA boards in particular. Adding the these IP blocks in with the standard free license in Vivado is a huge step in bringing FPGA design more into the open source world.

Xilinx's MIPI CSI controller subsystem IP blocks implements CSI-2 version 1.1, matching the implementation on a Raspberry Pi with an AXI-4 streaming interface to transfer data between the device and the processing system in the FPGA. Their MIPI DSI controller IP blocks implement DSI version 1.3 with a maximum data rate of 1.5Gb/s and an AXI-4 Lite interface to interface with the processing system in the FPGA.

Whitney Knitter
All thoughts/opinions are my own and do not reflect those of any company/entity I currently/previously associate with.
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