MicroZed Chronicles: Power Analysis with PYNQ & PMBus

How to analyze the power profile of algorithms using PYNQ PMBus and the DataRecorder.

Adam Taylor
4 years agoFPGAs

Last week I introduced how we can use PYNQ to access telemetry data on a boards power system, if it uses PMBus. In this article, we are going to look at how we can use the this capability in PYNQ to log and analyze power data.

The main element we will be using to do this is the DataRecorder contained within the PMBus package.

The DataRecorder provides the ability to stop, start and reset sampling on selected PMBus sensors. We can achieve fine grained control of the sampling period as we are able to define the sampling period when the DataRecorder is started.

The output from the DataRecorder is a pandas frame; if you are not familiar with pandas, it is built upon NumPy and enables us to easily plot the results using MathPlotLib.

In pandas there are two basic structures, series and frames. A series is essentially a column of values, while a frame is a multidimensional array of values.

Setting up the data recorder is simple; the first thing to do is define the rails that we wish to monitor. We can monitor several rails, and can determine the rails and the capabilities in our system by using the commands shown below.

Running pmbus.get_rails() will return a dictionary of the rails and available in the power system along with there values. To understand what rails are available we can print the dictionary.

When I did this for the ZCU104 I am generating this example on, the following was returned. Note how you can see not only the voltage but also the current and power, also visible is the input bus voltage.

We can create a data recorder, using this information. For example, to sample the input voltage and current we can configure the data recorder as below.

This samples the sensors every 0.2 seconds and samples for 30 seconds.

This information can then be plotted.

However, the example above is measuring steady state conditions on the PYNQ board. What we really want to know is how the power fluctuates when we are executing algorithms on either the processors (PS) or the programmable logic (PL).

To do this, we can add in the DataRecorder configuration and start / stop functions, in line with the code we wish to profile.

Using the ZCU104, I downloaded the PYNQOpenCV package, instrumented the code with the DataRecorder and ran the application on both on the SW and PL to determine the power demands of both implementations.

Running the same optical flow algorithm with acceleration on the PL

Of course, the results show what you might expect the PL implementation takes slightly higher power for a much shorter duration. If desired, we could analyze the pandas frame data to determine the actually power efficiency of both solutions.

The DataRecorder is like the FSM generator, signal generator, logic tracing, IOP another function in PYNQ which allows us to work with Python and hardware effectively.

It also lets us understand the behavior of our system in more depth, too.

See My FPGA / SoC Projects: Adam Taylor on Hackster.io

Get the Code: ATaylorCEngFIET (Adam Taylor)

Access the MicroZed Chronicles Archives with over 300 articles on the FPGA / Zynq / Zynq MpSoC updated weekly at MicroZed Chronicles.

Adam Taylor
Adam Taylor is an expert in design and development of embedded systems and FPGA’s for several end applications (Space, Defense, Automotive)
Latest articles
Sponsored articles
Related articles
Latest articles
Read more
Related articles