Microchip Opens Early Access Program for RISC-V-Powered Linux-Compatible PolarFire SoC FPGA

"The industry’s first RISC-V based SoC FPGA," as Microchip positions it, is now available to "qualified customers."

Gareth Halfacree
4 years agoFPGAs
The PolarFire SoC FPGA platform includes a RISC-V CPU cluster. (📷: Microchip)

Microchip has announced an early access program for its PolarFire SoC family of field-programmable gate arrays (FPGAs) — devices it is positioning as the first in the market to offer a hardened, real-time, Linux-compatible RISC-V microprocessor subsystem.

Microchip claims that its upcoming PolarFire SoC FPGA range will draw as little as half the power of rival designs, but it's not the low-power PolarFire FPGA side of the design that is of most interest: It's a deterministic coherent CPU cluster, fully Linux compatible, built on top of the free and open RISC-V instruction set architecture.

In the PolarFire SoC design, the CPU cluster is made up of a "monitor core" based on the 64-bit RV64IMAC RISC-V ISA, and a quad-core RV64GC general-purpose compute cluster. The deterministic nature of the cluster, along with a deterministic L2 cache subsystem which sits on the other side of a coherent switch ahead of the platform's DDR4/LPDDR4 controller, means that hard real-time operations are possible.

"Delivering the industry’s first RISC-V based SoC FPGA along with our Mi-V ecosystem, Microchip and its Mi-V partners are driving innovation in the embedded space, giving designers the ability to develop a whole new class of power-efficient applications," explains Bruce Weyer, vice president of the Field Programmable Gate Array business unit at Microchip. "This in turn will allow our clients to add unprecedented capabilities at the edge of the network for communications, defence, medical, and industrial automation."

The PolarFire SoC has yet to launch commercially, but Microchip opened an early access program at the RISC-V Summit this week. Under said program, "qualified customers" will be granted access to the platform using the Libero SoC 12.3 FPGA design suite and SoftConsole 6.2 IDE for development and the Renode framework for debugging. The platform will also form part of the company's Mi-V RISC-V ecosystem, Microchip has confirmed.

Interested parties looking to gain early access to the PolarFire SoC are asked to apply via email.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire: freelance@halfacree.co.uk.
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