Hrvoje Cavrak's EDSAC Recreation Packs a 1949 Computer, Teletype, Tape and Oscilloscope Into an FPGA
Owners of a MiSTer FPGA board can now play around with 1949's hottest new computer, the Electronic Delay Storage Automatic Calculator.
Engineer Hrvoje Cavrak has been hard at work combining modern technology with vintage, building a recreation of EDSAC — a computer dating back to 1949 — on a field-programmable gate array (FPGA).
"This is a FPGA implementation of EDSAC (Electronic Delay Storage Automatic Calculator), the first practical general purpose stored program electronic computer in the world," Cavrak writes of the project. "Construction began in 1947 and it executed its first program in May, 1949. Featuring a mercury delay line memory, it had around 3400 vacuum tubes and consumed roughly 15kW of power. This fascinating computer also pioneered the concept of assembly language, using library routines and the first book about programming was written to accompany this cool machine. Fun fact — there is no procedure call instruction as the concept hasn't even been invented yet!
"EDSAC was also a home to one of the first games ever for a digital computer, noughts and crosses (known as tic-tac-toe across the pond), written by A.S.Douglas in 1952. This FPGA core can run the original code and enables you to play a game that's almost 70 years old, making it one of the oldest original games for a digital computer that survive to this day. One of the obvious but overlooked facts is that the game was a single player variant and you were competing against the machine AI."
Cavrak's recreation takes a little less than 15kW of power, and precisely zero vacuum tubes: Building on his earlier projects to bring vintage computers to life in FPGA form, Cavrak's EDSAC is a soft-core implementation designed to run in the MiSTer FPGA platform.
Those with a compatible FPGA will find both EDSAC itself plus software-based oscilloscope racks for displays, a teletype terminal borrowed from Cavrak's earlier PDP-1 project, paper-tape input support, and a recreated front panel — all stored directly within the FPGA, using some clever compression techniques to pack the background imagery. There's even audio support, implemented in a mere 50 source lines of code (SLOC).
Cavrak's recreation, written in Verilog, is available on the project's GitHub repository.