Guarav Singh Reverse-Engineers the iPod 1.54" Display Panel, Releases Verilog DSI Bridge
With some clever reverse-engineering — and particularly tricky soldering — Singh has created a means to use old iPod displays with FPGAs.
Engineer Guarav Singh has released an open-source SPI to MIPI DSI bridge, designed to allow a field-programmable gate array (FPGA) to drive a salvaged 1.54" LCD display panel without any closed-source code.
"As display technology is advancing, high resolution LCD/TFT LCD panel are becoming more common," Singh writes. "With higher resolution comes nicer picture quality, rich content with higher bandwidth requirement to transfer that content from the display controller to the display it self. Gone those days of 8-bit parallel bus, now MIPI [Display Serial Interface] is becoming more and more common with nice display. Yes one can still buy parallel or LVDS interface display. But as one try to move towards nicer quality display MIPI is becoming dominant. Basic MIPI DPHY can achieve 1Gps per-lane with MIPI DPHY V2.5 you can go up to 6Gbps Max total bandwidth."
While most commercial SoC designs include a MIPI DSI block for driving displays, they're typically based on proprietary closed-source hardware. Singh's detailed write-up goes into the creation of an open-source equivalent, written in the Verilog hardware description language and ready to run on an FPGA - complete with full source, released under the GNU General Public Licence 3.0 copyleft licence.
Using a display salvaged from an old iPod, and a bit of fine-pitch soldering, Singh was able to reverse-engineer the panel and write some Verilog to implement the MIPI DSI signal. Following the protoboard work to prove the concept, Singh created a PCB which sits between the Lattice Semiconductor FPGA development board and the display panel - making installation as simple as inserting a ribbon cable into a socket. Finally, Singh developed a PIC32-based host adapter which provides an SPI interface over USB, plus a matching Qt5-based GUI application, to allow a host device to control the display via the FPGA.
Singh's full write-up is available on the CircuitValley blog, while the Verilog source code can be found on his GitHub repository.