Espressif's Unannounced RISC-V ESP32-H2 LR-WPAN SoC Leaks in an SDK Update

Wi-Fi out in favor of 802.15.4, while lower minimum and maximum clock speeds suggest a lower-powered device than the ESP32-C3.

Eight months after a leak pre-empted the launch of the ESP32-C3, Espressif's first part to use a RISC-V core as its central processor, a new model has been discovered ahead of an official announcement: the ESP32-H2.

Espressif's ESP32-C3 leaked late last year as its first RISC-V-only system-on-chip, offering a single 32-bit processing core running at up to 160MHz, 400kB of static RAM (SRAM), 2.4GHz Wi-Fi and Bluetooth Low Energy (BLE) 5.0 connectivity, and 22 programmable general-purpose input/output (GPIO) pins — in a package designed to be pin-compatible with the company's popular ESP8266.

Now, the company's next RISC-V-only SoC has leaked — as a part with a clear focus on ultra-low-power IoT applications.

First spotted by Thanchai Artsamart on Twitter, then given a more in-depth analysis by CNX Software, the ESP32-H2's existence was revealed by changes to the company's software development kit. Overall, it appears to be a variant of the ESP32-C3 — but with some key changes.

The first is that the RISC-V CPU has been down-clocked, now running from 16MHz up to 96MHz from the ESP32-C3's 40MHz to 160MHz — pointing to a device with, potentially, a lower power draw. The ESP32-H2 lacks Wi-Fi, too, swapping the radio out for one compatible with 802.15.4-standard low-rate wireless personal area networks (LR-WPANs) — suggesting compatibility with Zigbee, Thread, and other LR-WPAN standards.

Thus far, Espressif has neither confirmed nor denied the ESP32-H2's existence — but its presence in the company's official software suggests an unveiling could be right around the corner.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire:
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