Dan Rodrigues' Icestation-32 Is an Open, RISC-V-Based Games Console for iCE40 FPGA Owners

Dan Rodrigues has designed a compact games console that's is open from the ground up — from its toolchain to the RISC-V processor core on which its software runs.

"This is a compact open source FPGA game console targetting the Lattice iCE40 UltraPlus series," Rodrigues explains. "It's being developed using the open source yosys and nextpnr tools and run on the iCEBreaker FPGA board. It requires the 12bpp HDMI PMOD for video output."

The tools used to build the console, dubbed the icestation-32, aren't the only open thing about it: The console is driven by a PicoRV32 soft-core CPU running on the FPGA, a 32-bit implementation of the free and open source RISC-V instruction set architecture (ISA) designed to be as compact as possible.

The console also includes 64kB of RAM for the CPU and the same again for the video display processor (VDP) — a custom creation written by Rodrigues to handle smooth scrolling and sprite work. The video output is configurable for 640x480 or 848x480 resolution, both at 60 frames per second, and uses a tiled arrangement which assembles four bits per plane (4BPP) graphics from 8x8 tiles using an ARGB16 colour palette split into 16 individual palettes of 16 colours each.

Rodrigues' console isn't the first to be built around a RISC-V soft-core processor: Earlier this month Sonal Pinto released details of an Arduboy clone built around the Kronos: Zero Degree RISC-V SOC.

While Rodrigues describes the project as a work in progress and subject to change, he has already released the source code, a simulator, and demo software on GitHub.