Antmicro Joins the EC's VEDLIoT Project to Bring Ultra-Efficient RISC-V Deep Learning to the IoT

Three-year project to give the IoT highly-efficient deep learning "microservers" now set to get an FPGA-powered RISC-V prototype.

Open source silicon pioneer Antmicro has announced its involvement in the European Commission's Very Efficient Deep Learning in Internet of Things (VEDLIoT) project, with the aim of developing a next-generation platform specifically for the IoT — and it's looking like that platform will centre around the free and open source RISC-V architecture.

"Comprising a 12-member international research group, VEDLIoT aims to develop a next-generation software/hardware platform for the Internet of Things," the company explains of the project, coordinated by Bielefeld University's CoR-Lab. "Antmicro’s contributions, among other things, will be to leverage its leading position in RISC-V, machine learning and simulation, developing open source RISC-V-based soft SoC infrastructure for the project and providing a Renode simulation environment for testing the platform’s security and robustness."

"As a RISC-V International Strategic Founding Member and an active developer of this open source ISA and its ecosystem, we are glad to be able to contribute to the project with our experience in using FPGA-based RISC-V solutions and simulation," adds Michael Gielda, Antmicro’s vice president of business development. “VEDLIoT’s objectives align well with those of Antmicro: to enhance IoT and edge AI systems development with open source tools, workflows and platforms”.

"Computer and IoT systems are getting more and more efficient. This is enabling us to solve more challenging problems and accelerate automation in order to improve our quality of life," says project coordinator Professor Dr.-Ing. Ulrich Rückert of the problem VEDLIoT aims to solve. "But the volume of the data that is collected and processed is enormous — and the computing power required for this is very high. In addition, the algorithms are often too complex to quickly generate solutions in an appropriate amount of time."

The VEDLIoT project itself launched late last year with €8 million (around $9.7 million) in funding to be spent over a three-year period on building a modular hardware system which attaches "microservers" to a flexible carrier, allowing for individual configuration "suitable for universal use." At the time, few details were provided on what form the microservers would take; Antmicro's involvement now guarantees that at least one implementation will be based around the RISC-V instruction set architecture.

Additional details on Antmicro's involvement can be found on the company website; more information on VEDLIoT is available via the EU CORDIS system and on the project website, with the coordinators still looking for companies with which to partner. The first functional prototype of the platform is scheduled for mid-2022.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire:
Latest articles
Sponsored articles
Related articles
Latest articles
Read more
Related articles