You may not know it, but synchronous counters are everywhere in digital electronics. CPUs are full of them. Appliances all have them in their microcontroller. Digital clocks have them. They are everywhere! Integrated circuit manufacturers all build very sophisticated, versatile, synchronous counters. Examples are the 74HC193, DM74LS169, and SN54ALS191A.
Many electronic hobbyists are familiar with the asynchronous ripple counter. They are easy to understand and work great. So what's the problem with them?
Counters are made from flip flops. It takes time for a flip flop to change states. When the clock input to one stage of a counter depends on the previous stage to change states, that time delay becomes cumulative. For a slow counter, no one cares about propagation delay. But if you have a 64-bit counter operating at 1 GHZ, even a 0.1 nanosecond propagation delay per stage is a disaster. You would have to sit and wait for many clock cycles for your counter to finally come to rest at its final state.
So digital logic designers are taught to avoid asynchronous counters all together. They simply pose too many timing issues even at slow speeds, and they become completely useless at very high speeds.
So this tutorial is all about flip flops and synchronous counters, how to count up and down, how to preload numbers into them, how the cascade them together, all the things that modern, versatile synchronous counters can do!
I have recently been experimenting with various counter designs using Logisim. I described Logisim in a previous posting Logic Design with Logisim. Logisim is available here. I have now learned a lot about counters and will share it with you in this tutorial.
The JK Flip FlopA flip flop is the fundamental sequential logic circuit used to store a single bit (1 or 0) of binary data. Unlike simple logic gates, flip-flops have two stable states and rely on "feedback" so that the output depends on both current and past inputs. Because flip flops can hold a state, they are the foundation for memory, registers, and counters.
While there are several kinds of flip flop, everything we will talk about here is accomplished with JK flip flops. I used to think JK flip flops were mysterious compared to toggle flip flops, SR flip flops, and D flip flops, but JK flip flops are simply general purpose flip flops, which can easily be configured into whatever kind of flip flop you need.
All flip flops have a clock input and two outputs: Q and Q' (not Q). The JK flip flop has two additional inputs J and K which allow it to be configured into any flip flop.
The JK flip flop is made up of four gates configured as shown above. You can also see the truth table for the JK flip flop.
So, how do we make other flip flops out of the JK flip flop? Let's start with the T or toggle flip flop. Here is its truth table:
For a toggle flip flop, when T is 1, it changes state with every rising clock pulse. If T is 0, there is no change with a clock pulse.
Creating a toggle flip flop with a JK flip flop merely requires tying J and K together and they become the T.
Similarly, the D flip flop has the following truth table:
And it can be derived from the JK flip flop like this:
And the SR flip flop has this truth table:
It can be derived from the JK flip flop like this:
So we can easily derive any flip flop we need from JK flip flops. All the counters we will design will be made up of JK flip flops!
The Asynchronous Ripple CounterThe simplest binary counter consists of toggle flip flops where the output of one flip flop becomes the clock input for the next flip flop:
We have four JK flip flops configured as toggle flip flops. The Q' output of one stage is connected to the clock of the next step. The rising clock pulse into stage1 latches stage1 on. The second clock pulse turns stage 1 off, which causes stage1's Q' to go high, turning stage2 on, etc. This counter counts from 0 to 15.
Again, as we said earlier, the asynchronous counter builds up cumulative propagation delays, so everything else we will discuss is synchronous.
In this counter, I have the flip flop stages progressing from left to right, which seems to be the normal way we read and process information. But we expect to see numbers presented with the least significant bit on the right and the more significant bits to the left, so you can see I have reversed the order of the LEDs displaying the output of our counter. This will be true for every counter I present here.
The Synchronous CounterSynchronous counters are more complicated than asynchronous, but all stages of the counter change state at once. They have the propagation delay of a single stage, but not the cumulative propagation delay we get from asynchronous counters.
There are several ways to build synchronous counters using JK flip flops. The one above is probably the simplest. We have four JK flip flops again configured as toggle flip flops. The first thing to notice is that all four flip flops are clocked directly by the clock signal, changing state synchronously. The first stage toggles with every rising clock pulse. But for each of the other 3 stages, they only toggle when all the stages in front of them are high. That is the function of the AND gates you can see. They only set T high, allowing a toggle, when every stage before it is already high. This counter counts from 0 to 15, just like the asynchronous counter you saw above.
Notice that I added a third AND gate that produces a carry bit. We will discuss how multiple synchronous counters can be hooked together or cascaded in a little bit.
The Down and Up/Down CounterThe down synchronous counter is only slightly different than the up counter. The first stage still toggles with every rising clock pulse, For each of the other 3 stages, they only toggle when all the stages in front of them are low.
And because the up and down counters are similar, it is fairly easy to create an up and down counter, as shown below, by adding a few AND gates to select which way we count.
In general, counters tend to be more useful if they can be preset to a specific number. We can accomplish this with JK flip flops by using gates to temporarily turn our flip flops into SR flip flops. Then we put the desired preset number into the S and R inputs and on the next rising clock pulse, our preset is loaded into the flip flops. Then turn off the preset and our flip flops turn back into a counter.
For the specific case I am showing you here, we have taken our down synchronous counter, added preload circuitry, then added an extra flip flop (at the far right) that is configured as a D flip flop latch which stops the count when it reaches 0, and stays there until we use preload again to restore the down counter. So, for example, this counter could be used as a timer, starting at a preset number and counting down to 0.
In the image above, we have just loaded the number decimal 10 (binary 1010) into the preload at the bottom, pulsed the clock and our 10 now appears at the output of the counter.
Cascading Synchronous CountersIn real world circuits, large counters are frequently created by linking together or cascading several synchronous counter ICs. This cascading process with synchronous counters is complicated by the fact that the clock signal is applied to every flip flop in each IC.
Two pieces of information must be present for a given section of the counter to increment. The counter before it must have all its flip flops high (max count setting the carry high) and the counter before it must be incremented. The signal saying both conditions are satisfied is referred to as the Rollover signal.
In Logisim, we can demonstrate cascading by encapsulating our 4-bit up/down counter in a sub-circuit, which is just like turning it into an IC.
This is our sub-circuit counter, complete with up/down logic and cascade logic. First, we needed to change our count enable so that when 0, all 4 flip flops are stopped from counting. Three AND gates are added at the bottom of the circuit to accomplish this. Then we can add one more AND gate and combine the carry bit and the count enable to produce the rollover signal which tells the next section of the counter to increment.
And here is a 20-bit counter, made up of 5 of our 4-bit sub-circuits.
We can also replace those 20 LEDs with hexadecimal displays, showing the content of each 4-bit sub-circuits as a single hexadecimal number.
Let's take the 20-bit synchronous counter above and turn it into a decade up counter.
The image above shows some changes we've made in the upper right corner of the counter sub-circuit. We have removed the last stage carry and replaced it with an AND gate that goes high when the count reaches 9. This produces our rollover signal at 9, instead of 15. And another AND gate goes high when 10 is reached, setting all flip flops to 0.
So here is our 20-bit decade counter counting up. We would need to add some additional logic to allow our decade counter to count down.
The Up/Down Presettable Cascading Synchronous CounterWe are finally ready to put it all together and create a counter with all the features we have discussed separately. Here is our synchronous counter with preset, up/down, and cascade capable.
Above is the 4-bit sub-circuit for our final counter. And below we have built a 20-bit counter from 5 of these sub-circuits, hooked everything up, and we have all these capabilities built into our counter.
Counters like this are the most versatile, and as a result, are commonly designed into computer hardware and other electronics. Most integrated circuit suppliers offer 4-bit counters very similar to our sub-circuit above. The 74HC193, DM74LS169, and SN54ALS191A are three such ICs.




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