TLC5973 LED Driver MSP432 with Bluetooth

//*****************************************************************************
//
// MSP432 main.c template - Empty main
//
//****************************************************************************
#include "msp.h"
#include "stdint.h"

#define FLCTL_BANK0_RDCTL_WAIT__2    (2 << 12)
#define FLCTL_BANK1_RDCTL_WAIT__2    (2 << 12)

#define WriteCommand			0x3AA
#define NumberOfLED				3

#define SignalOut				P1OUT
#define SignalBit				BIT0
#define SignalDir				P1DIR

void INIT (void);
void setLed(unsigned short R, unsigned short G, unsigned short B);
unsigned int writeWord(unsigned short word);
void writeZero (void);
void writeOne (void);
void waitGSLAT(void);
void waitSEQ(void);

uint16_t Data,up=0,last = 0,z = 0;
//void error(void);

int main(void){
	//    uint32_t currentPowerState;
	WDTCTL = WDTPW | WDTHOLD;               // Stop WDT


	INIT();

	uint16_t const LedData_0[NumberOfLED][3] = {0xEEE,0x000,0x000,
			0x000,0xEEE,0x000,
			0x000,0x000,0xEEE };
	uint16_t LedData_1[NumberOfLED][3] = {0};

	volatile uint16_t j,h;
	for(j=0;j<NumberOfLED;j++){
		for(h=0;h<3;h++)
			{LedData_1[j][h] = LedData_0[j][h];}
	}
	__enable_interrupt();
	NVIC_ISER0 = 1 << ((INT_EUSCIA2 - 16) & 31); // Enable eUSCIA2 interrupt in NVIC module
	NVIC_ISER0 |= 1 << ((INT_TA0_0 - 16) & 31);


	volatile uint16_t d,l,z;
	while(1)
	{

//		for(d =1000; d>0;d--){}
		switch (UCA2RXBUF){
		case 'A':
			for(l=0;l<NumberOfLED;l++){
				setLed(0x000,0x000,0x000);
			}
			waitGSLAT();
			UCA2RXBUF = 0;
			break;
		case 'B':
			for(l=0;l<NumberOfLED;l++){
				setLed(0,0,0xEEE);
			}
			waitGSLAT();
			UCA2RXBUF = 0;
			break;
		case 'C':
			for(l=0;l<NumberOfLED;l++){
				setLed(0,0xEEE,0);
			}
			waitGSLAT();
			UCA2RXBUF = 0;
			break;
		case 'D':
			for(l=0;l<NumberOfLED;l++){
				setLed(0xEEE,0,0);
			}
			waitGSLAT();
			UCA2RXBUF = 0;
			break;
		case 'E':
			for(l=0;l<NumberOfLED;l++){
				setLed(0xEEE,0xEEE,0xEEE);
			}
			waitGSLAT();
			UCA2RXBUF = 0;
			break;
		case 'F':
			while(UCA2RXBUF == 'F'){
				setLed(0x000,0xEEE,0x000);
				setLed(0x000,0x000,0xEEE);
				setLed(0xEEE,0x000,0x000);
				waitGSLAT();
				for(z=25000;z>1;z--){
					for(l=100;l>1;l--){}
				}
				setLed(0xEEE,0x000,0x000);
				setLed(0x000,0xEEE,0x000);
				setLed(0x000,0x000,0xEEE);
				waitGSLAT();
				for(z=25000;z>1;z--){
					for(l=100;l>1;l--){}
				}
				setLed(0x000,0x000,0xEEE);
				setLed(0xEEE,0x000,0x000);
				setLed(0x000,0xEEE,0x000);
				waitGSLAT();
				for(z=25000;z>1;z--){
					for(l=100;l>1;l--){}
				}
			}
			break;
		}
	}
}

void UartISR(void){
	if (UCA2IFG & UCRXIFG)
	{
		while(!(UCA2IFG&UCTXIFG));

				UCA2TXBUF = UCA2RXBUF;
	}
}

/* ISR for Timer to Generate pulse 10us */

void TimerA0_0IsrHandler(void)
{
	TA0CCTL0 &=~CCIFG;
	SignalOut |= SignalBit;
	z++;
	SignalOut &=~SignalBit;
	z++;
	if(Data & 0x800)
	{
		SignalOut |= SignalBit;
		z++;
		SignalOut &=~SignalBit;
	}
	Data <<=1;
	++up;
	++last;
}

unsigned int writeWord(unsigned short word){


	Data = word;
	while(up < 12);
	up = 0;
	return 1;
}

void setLed(unsigned short R, unsigned short G, unsigned short B){

	TA0CCTL0 = CCIE;
	TA0CCR0 = 120-1;

	while (writeWord(WriteCommand)==0);

	while (writeWord(R)==0);

	while (writeWord(G)==0);

	while (writeWord(B)==0);

	TA0CCTL0 &=~CCIE;
	up=0;

	waitSEQ();
}

void waitGSLAT(void){
	volatile uint16_t h;
	for(h = 200;h > 0;h--){}
}

void waitSEQ(void){
	volatile uint16_t h;
	for(h = 80;h > 0;h--){}
}

void INIT (void){

	P2DIR |= BIT0;
	SignalDir |= SignalBit;
	SignalOut &=~SignalBit;

	P4DIR |= BIT3 | BIT4;
	P7DIR |= BIT0;
	P7SEL0 |= BIT0;
	P7SEL1 &=~BIT0;
	P4SEL0 |=BIT3 | BIT4;                         // Output MCLK
	P4SEL1 &= ~(BIT3 | BIT4);

	/* NOTE: This example assumes the default power state is AM0_LDO.
	 * Refer to  MSP4322001_pcm_0x code examples for more complete PCM operations
	 * to exercise various power state transitions between active modes.
	 */

	/* Step 1: Transition to VCORE Level 1: AM0_LDO --> AM1_LDO */

	/* Get current power state, if it's not AM0_LDO, error out */
	//    currentPowerState = PCMCTL0 & CPM_M;
	/*   if (currentPowerState != CPM_0)
    	error();*/

	while ((PCMCTL1 & PMR_BUSY));
	PCMCTL0 = PCMCTL0_KEY_VAL | AMR_1;
	while ((PCMCTL1 & PMR_BUSY));
	/*    if (PCMIFG & AM_INVALID_TR_IFG)
        error();                            // Error if transition was not successful
    if ((PCMCTL0 & CPM_M) != CPM_1)
        error(); */                           // Error if device is not in AM1_LDO mode

	/* Step 2: Configure Flash wait-state to 2 for both banks 0 & 1 */
	FLCTL_BANK0_RDCTL = FLCTL_BANK0_RDCTL & ~FLCTL_BANK0_RDCTL_WAIT_M | FLCTL_BANK0_RDCTL_WAIT_2;
	FLCTL_BANK1_RDCTL = FLCTL_BANK0_RDCTL & ~FLCTL_BANK1_RDCTL_WAIT_M | FLCTL_BANK1_RDCTL_WAIT_2;

	/* Step 3: Configure HFXT to use 48MHz crystal, source to MCLK & HSMCLK*/


	PJSEL0 |= BIT2 | BIT3;                  // Configure PJ.2/3 for HFXT function
	PJSEL1 &= ~(BIT2 | BIT3);

	CSKEY = CSKEY_VAL;                      // Unlock CS module for register access
	CSCTL2 |= HFXT_EN | HFXTFREQ_6 | HFXTDRIVE;
	while(CSIFG & HFXTIFG)
		CSCLRIFG |= CLR_HFXTIFG;
	CSCLRIFG |= CLR_FCNTHFIFG;
	/* Select MCLK & HSMCLK = HFXT, no divider */
	CSCTL1 = CSCTL1 & ~(SELM_M |DIVM_M| SELS_M | DIVS_M)| DIVS_2 |  SELM__HFXTCLK | SELS__HFXTCLK ;

	CSKEY = 0;                             // Lock CS module from unintended accesses

	TA0CTL = TASSEL_2 + MC_1 + TACLR ;         // SMCLK, up mode, clear TAR
	TA0CCTL0 = CCIE;
	TA0CCTL0 &=~CCIFG;

	P3SEL1 &=~( BIT2 | BIT3);
	P3SEL0 |= BIT2|BIT3;

	// Configure UART
	UCA2CTLW0 |= UCSWRST | UCSSEL__SMCLK;             // Put eUSCI in reset
	// Baud Rate calculation
	// 12000000/(16*9600) = 78.125
	// Fractional portion = 0.125
	// User's Guide Table 21-4: UCBRSx = 0x10
	// UCBRFx = int ( (78.125-78)*16) = 2
	UCA2BR0 = 78;                           // 12000000/16/9600
	UCA2BR1 = 0x00;
	UCA2MCTLW = 0x1000 | UCOS16 | 0x0020;

	UCA2CTLW0 &= ~UCSWRST;                  // Initialize eUSCI
	UCA2IE |= UCRXIE;                       // Enable USCI_A2 RX interrupt

}