Adam Taylor
Published © GPL3+

High Performance Imaging

Using the Genesys ZU 3EG to implement an image processing pipeline with the latest Xilinx image processing IP cores.

IntermediateFull instructions provided5 hours4,732
High Performance Imaging

Things used in this project

Hardware components

Digilent Genesys ZU
×1
Digilent PCAM5
×1

Software apps and online services

Vivado Design Suite
Xilinx Vivado Design Suite
Xilinx Software Development Kit
Xilinx Software Development Kit

Story

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Credits

Adam Taylor

Adam Taylor

70 projects • 838 followers
Adam Taylor is an expert in design and development of embedded systems and FPGA’s for several end applications (Space, Defense, Automotive)

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