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Cooling fans are widely used and extremely important for electronic devices, especially for those that are constantly running, such as power supplies, servers, computers, and telecommunication equipment.
Low-cost cooling systems are often based on 2-wire fans that constantly run at full speed. The absence of temperature proportional speed control and the inability to detect fan lock (usually possible only with more expensive 3-wire fans) shortens the fan life and can lead to fatal damage for the system being cooled.
This article describes how to configure the SLG47105 IC to implement a smart PWM fan driver with temperature proportional speed control and lock detection for a 12V 2-wire fan. This represents a low-cost solution with minimal external components. The internal design was implemented in the Go Configure Software Hub. The complete design file can be found here: AN-CM-332 Smart PWM Fan Driver.gp.
The most common types of cooling fan use brushless DC motors with a simple internal commutation circuit based on a Hall sensor, powered with a DC voltage. The speed of the fan is proportional to the DC voltage and can be controlled with PWM.
Construction and Operating PrincipleThis design has 4 inputs and 1 output:
PIN#2 — Analog input to control the fan speed
PIN#3 — Control mode selection input
PIN#14 — PWM input for direct control of the output driver
PIN#17 — Shutdown input, to disable the fan
PIN#16 — Fault output, active low
In the application circuit depicted above, the mode input is connected to GND and the design works in “analog mode” (the fan speed is proportional to the voltage on PIN#2). The design also allows one to control the output driver directly with a PWM signal on PIN#14. In this case, the mode input must be connected to VDD (“digital mode”).
PIN#19 and PIN#20 are used to detect temperature thresholds. They must both be connected to PIN#2 in “analog mode” and both connected to VDD in “digital mode”.
This block allows one to control the fan speed using a voltage input. The duty-cycle of the PWM that drives the fan is proportional to the input voltage (between 0V and 3V).
The differential amplifier with integrator and comparator macrocell amplifies the voltage on the HV outputs, extracts the mean value, and compares it with the reference voltage (the voltage Vin on PIN#2). The macrocell activates the “equal” or the “upword” outputs according to the result of the comparison.
The PWM macrocell uses the “equal” and “upword” signals to increment or decrement the duty-cycle counter, which stores an 8-bit value representing the duty-cycle of the generated PWM waveform.
In this way, the block implements a loop that adjusts the duty-cycle to keep the following expression true:
Vmean = 4*VIN
where Vmean is the mean voltage on the fan, and the constant 4 is the gain of the differential amplifier.
Because of this, the output duty-cycle depends on the input voltage according to the following equation:
dc (%) = (4*VIN / VDD2_A)*100
In this example, where VDD2_A is 12V, we get a duty-cycle of 100% with VIN = 3V. Figure 6 shows the output PWM waveform (CH1) and input voltage (CH2) where VIN ≈ 1.5V and thus dc ≈ 50%.
This block can detect if the fan stops, either because it is forced to stop or because it is disconnected from the driver. When a lock is detected, the output driver is disabled. In the first case, this is also necessary to protect the fan from fatal damage. In both cases the block is useful to activate a fault output so that the system can protect itself from overheating.
In addition, when a lock is detected, this block attempts to automatically restart the fan after a programmable delay time.
This block is based on current measurement by means of a resistor connected in series with the driver. The resistor provides a voltage signal proportional to the motor current at the sensor input.
To understand how to detect fan lock, we need to understand the circuitry of a DC brushless fan.
Brushless DC fans use a simple switching circuit like the one depicted in Figure 8. The Hall sensor switches on one of the two transistors according to the rotor position to activate the correct coil and ensure rotation. These commutations cause short and periodic interruptions of the fan current, as shown in Figure 9. On the other hand, if the fan is locked, there is no commutation and no current interruption, as shown in Figure 10.
The comparator CCMP0 is used to provide a pulse every time there is a current interruption. The falling edges of these pulses keep triggering the CNT1/DLY1 macrocell (configured in delay mode), which will hold its output low as long as the pulses keep coming. If no pulses occur for about 50ms, the output will go high, triggering the CNT3/DLY3 (configured in one shot mode) to provide a negative pulse with a duration of 5 seconds. During this interval, the output driver is disabled. The fault output is active low, and it is driven by the CNT3/DLY3 output.
After 5 seconds, the output driver is enabled again. If the fan is still locked, the device will enter the fault state again.
The 3-input OR is used to disable the lock detection logic as described in the following section.
Start-up TimerSince the fan can’t start spinning instantly due to its inertia, the lock detection logic might detect a false fault condition and disable the output driver prematurely. This block is used to bypass the lock detection logic during the start-up of the motor to avoid this unwanted condition.
The block uses the CNT2/DLY2 in one shot mode activated on the falling edge. The falling edge is generated either by the POR and by the “SHDN” signal. In the first case, a rising edge detector generates a short pulse triggered by POR so that the start-up signal is generated at power-on. A falling edge of the “SHDN” signal instead corresponds to all the cases in which the fan is being restarted.
When the falling edge is detected, the “STARTUP” output goes high for about 125ms, forcing a logic 1 at the input of CNT1/DLY1 (see Figure 7) no matter what signal is coming from CCMP0. This allows one to disable the lock detection chain that is triggered by falling edges (the “STARTUP” signal could just generate a rising edge, but it will have no effect).
Minimum Speed and Stop ThresholdThe design allows one to set a minimum fan speed and a minimum temperature below which the fan is disabled.
For this purpose, two voltage comparators are used. The inputs of the comparators are connected to the Vin voltage that controls the speed of the fan and which is proportional to the sensed temperature.
Due to the direct proportionality between input voltage and speed (as shown in Section 5.1), it’s possible to set the minimum fan speed by setting the voltage threshold on the comparator. When the input voltage goes below the threshold, the output of the comparator (MIN SPEED) goes low and, through the 2-bit LUT, forces high the “keep” input of the PWM macrocell. In this way, the output duty-cycle can’t decrease any further as long as the input voltage is below the threshold, thus setting a minimum fan speed.
A similar concept is valid for the other comparator. In this case, the voltage threshold must correspond to the minimum temperature according to the temperature sensor used. When the input voltage goes below the threshold, the output of the comparator (FAN STOP) goes low and disables the output driver, stopping the fan.
For both the comparators a 32mV hysteresis is used.
ResultsProportionality between the input voltage and the output duty-cycle:
Lock detection:
Minimum temperature (the fan is stopped when the input voltage goes below a minimum threshold):
This article shows how the High Voltage GreenPAK IC SLG47105 can be configured to implement a smart PWM fan driver with minimal external components. The design is very flexible and can be adapted to a wide variety of fans thanks to the high-current capable integrated driver. The design also allows one to easily configure parameters including PWM frequency, minimum speed, and minimum temperature.
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