Low-power IP specialist Think Silicon has announced plans to launch a new ultra-low-power "micro-GPU" architecture, designed for accelerating artificial intelligence workloads at the edge and built atop the free and open source RISC-V instruction set architecture (ISA): NEOX.
"The NEOXTM architecture is the most flexible system we have ever developed," claims Think Silicon chief technology officer Dr. Iakovos Stamoulis. "It includes AI specific ISA extensions, SIMD [Single Instruction Multiple Data] Vector in variable length data-types including 8-bit, and optionally Graphics ISA Extensions/Coprocessors: Unified Shader Architecture, Tile Based Rendering, Color/Vertex, Vector Support and contains dedicated hardware modules such as rasterizer, texture unit, tile management unit and texture caches.
"Supporting a dedicated interface allows SoC architects to augment the instruction set with user defined instructions to enable product differentiations and the ability to create custom unique designs."
The NEOX architecture is, the company explains, based on the free and open source RISC-V ISA and offers compatibility with both graphics and deep learning acceleration compatibility. The design is scalable between four and 64 cores, uses the existing RISC-V toolchain with GCC and LLVM compiler compatibility, and comes with the promise of an ultra-compact area and low gate count.
The company has confirmed that the NEOX platform will also include a toolkit for AI inference work, including model conversion, an analyzer, profiler, and optimizers including a compression stage for deployment on the NEOX core itself — based, Think Silicon says, primarily on TensorFlow with converters available for other frameworks.
Full details on NEOX are to be unveiled at the Linley Fall Virtual Processor Conference later this month.