Pseudonymous engineering student "SdtElectronics" has shared an open hardware design for a sub-$10 single-board computer built around the latest version of Allwinner's D1 RISC-V system-on-chip: the Xassette-Asterisk.
"'Open source ISA' [Instruction Set Architecture] is surely an attractive title to geeks. No doubt that the RISC-V would got so much attention, but its hardware is not yet very accessible," SdtElectronics explains of the project. "In the mid of this year, Chinese chip company Allwinner released their first RISC-V 64 SoC D1, with a evaluation board costs about $100. If this price is not low enough for you, here is a SBC based on D1s, the newest SoC developed by Allwinner, with a total cost less than $10!"
The board is designed around the Allwinner F133, a system-in-package that includes the hardware of the earlier D1 system-on-chip with internal RAM — bringing the bill of materials down. Beside the chip, which features single 64-bit RISC-V core — built on a version of the ISA including pre-ratification vector extensions and custom instructions which are proving a stumbling block in efforts to mainline support for the core in Linux — and 64MB of DDR2 RAM, the board includes a general-purpose input/output (GPIO) header, two USB Type-C connectors, two 3.5mm jacks for analog audio input and output, an LCD connector, a camera connector, and a microSD slot for storage.
All told, SdtElectronics' design can be built for just under $10 in parts — the same price as the MangoPi-MQ1, a more compact board design built around the same Allwinner F133 SiP and pledged to be released as open hardware following mass production this month. Both are considerably cheaper than the Nezha, the first SBC to launch with an Allwinner D1 at its heart — and costing ten times as much.
More details on the board, including a schematic and KiCad project files licensed under the weakly-reciprocal version of the CERN Open Hardware License v2, are available on SdtElectronics' GitHub repository.