Sophgo Blends a Proprietary TPU with RISC-V and Arm Cores — and, Apparently, an Intel 8051 Clone

A blend of the very old and the very new, in a single system-on-chip targeting smart cameras and other edge AI devices.

Chip-design house Sophgo has announced a new pair of system-on-chip (SoC) parts targeting edge artificial intelligence (edge AI) workloads, combining four different processor architectures in a single device: RISC-V, Arm, a tensor processor, and — unusually in this day and age — the Intel 8051 architecture.

"SG2000 is a high-performance, low-power chip designed for various product fields such as edge intelligent surveillance IP cameras, local facial recognition attendance machines, and smart home devices," says embedded computing specialist Milk-V, which has partnered with Sophgo to produce boards built around the new chip range, in a post brought to our attention by CNX Software. "The chip also integrates an in-house TPU [Tensor Processing Unit], delivering approximately 0.5 TOPS [Tera-Operations Per Second] of computing power under INT8 operations."

The TPU is only one of four processor architectures in use in the Sophgo SG2000 and SG2002, the latter of which upgrades the on-board TPU coprocessor to 1 TOPS of INT8 computer. The chips also include two 64-bit T-Head C906 RISC-V cores, one running at 700MHz and dedicated to real-time operating system (RTOS) use and the other running at 1GHz and targeting Linux, a 1GHz Arm Cortex-A53 core, and — of all things, in the 21st century — a microcontroller core that appears to implement Intel's 8051 architecture.

Released back in 1980, the Intel MCS-51 brought the 8051 architecture to market as an affordable eight-bit microcontroller — but original Intel parts have long been discontinued. Nevertheless, that's what Sophgo has chosen for the microcontroller side of the parts — adding 6kB of dedicated static RAM (SRAM) to the core for good measure and allowing the core to clock from 25MHz up to an impressive-by-1980s-standard 300MHz.

Other features of the system-on-chip include an image signal processor good for five megapixels at 30 frames per second, a two-lane MIPI Display Serial Interface (DSI) and one four- or two two-lane MIPI Camera Serial Interfaces (CSIs), a 16-bit audio codec with two I2S and PCM channels and a digital microphone input, a Fast Ethernet PHY, hardware H.264/H.265 codecs, SPI NOR and NAND flash, eMMC 5.0, and two SDIO 3.0 storage buses, USB 2.0, and a range of general-purpose input/output (GPIO) pins including 16 pulse-width modulation (PWM) pins, six analog to digital converter (ADC) pins, six I2C and four SPI buses, and five hardware UART buses.

More information on the chip, including a link to download its Chinese-language data sheet, is available on the Milk-V website; the lower-end SG2000 model was listed for sale at Arace priced at $30 for five chips, but at the time of writing was showing as out of stock.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire:
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