Semidynamics Targets Easier, More Efficient Artificial Intelligence with Its RISC-V All-In-One AI IP

By offering scalable all-in-one "processing elements" that combine the features of CPU, GPU, and NPU, Semidynamics promises an easier time.

European RISC-V specialist Semidynamics is aiming to deliver a smarter approach to on-device artificial intelligence, by ditching the distinction between central, graphics, and neural processing units (CPUs, GPUs, and NPUs) in favor of a unified approach: the All-In-One AI processing element.

"The current AI chip configuration is inelegant with typically three different IP vendors and three tool chains, with poor PPA (Power Performance Area) and is increasingly hard to adapt to new algorithms," claims Semidynamics' chief executive officer Roger Espasa. "For example, they cannot handle such as an AI algorithm called a transformer but our All-in-One AI IP is ideal for this. We have created a completely new approach that is easy to program as there is just the RISC-V instruction set and a single development environment."

"Integrating the various blocks into one RISC-V AI processing element means that new AI algorithms can easily deployed without worrying about where to distribute which workload," Espasa continues. "The data is in the vector registers and can be used by the vector unit or the tensor unit with each part simply waiting in turn to access the same location as needed. Thus, there is zero communication latency and minimized caches that lead to optimized PPA but, most importantly, it easily scales to meet greater processing and data handling requirements."

Where a traditionally-designed system would have some combination of CPU, GPU, and dedicated NPU cores, each of which usually requires a different toolchain and that may not be suited to a given workload, Semidynamics' approach combines everything into a single processing element: a 64-bit CPU core built around the free and open-source RISC-V architecture, a vector processing unit, and a tensor processing unit. This, the company claims, reduces latency, improves PPA, and offers a unified programming environment to make it easy to get the best performance possible.

"The RISC-V core inside our All-In-One AI IP provides the 'intelligence' to adapt to today’s most complex AI algorithms and even to algorithms that have not been invented yet," Espasa claims. "The Tensor provides the sheer matrix multiply capability for convolutions, while the Vector unit, with its fully general programmability, can tackle any of today's activation layers as well as anything the AI software community can dream of in the future."

"Having an All-In-One processing element that is simple and yet repeatable solves the scalability problem so our customers can scale from a 1/4 TOPS [Tera-Operations Per Second] to hundreds of TOPS by using as many processing elements as needed on the chip," Espasa concludes. "In addition, our IP remains fully customizable to enable companies to create unique solutions rather than using standard off-the-shelf chips."

At the time of writing, however, Semidynamics had not named any hardware partners planning to bring its new IP to silicon — meaning it's not clear when physical chips will be available, nor at what price.

More information is available on the company's website.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire:
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