The Raspberry Pi hardware team has released initial versions of two new specifications, already in the wild thanks to the launch earlier this year of the Raspberry Pi 5: one for the connector carrying a PCI Express lane, and the other for what the company is calling Hardware Attached on Top Plus or HAT+.
"Once people had recovered from the shock of seeing both a power button and a real-time clock on a Raspberry Pi," James Adams, Raspberry Pi's chief operating officer and lead of the hardware team, says of the Raspberry Pi 5's launch, "one of the most commented-on features of the new platform was the small, vertical, 16-way FFC (Flat Flexible Cable) connector on the left-hand side of the board, which exposes a single-lane PCI Express interface."
The Raspberry Pi family is no stranger to high-speed PCI Express connectivity, having used it on the Raspberry Pi 4 for connectivity to the USB controller chip — but the Raspberry Pi 5, launched earlier this year, was the first mainstream board to break a lane out for external devices. At the time, Raspberry Pi promised a Hardware Attached on Top (HAT) which would convert the FFC connector into an M.2 slot for high-speed storage and other devices — though that isn't expected to launch until some time early next year, and as the first in what the company is calling the PIP (PCIe Peripheral) ecosystem.
Third parties have already begun to fill the void, with Pineberry Pi announcing the HatDrive! range and Pimorini the NVMe Base for Raspberry Pi 5 — and the ecosystem is set to grow still larger with the release of an official first-revision specification for the connector. "The interaction of PCIe peripherals with Raspberry Pi power states and firmware required detailed consideration," Adams explains for why the specification wasn't available at hardware launch, "and we wanted to make sure we had done extensive testing of our own prototype product to make sure everything was working as expected."
At the same time, Raspberry Pi has announced the preliminary release of the HAT+ specification — updating 2014's Hardware Attached on Top (HAT) standard to bring with it changes including simplified handling of expansion boards' on-board electrically erasable programmable read-only memories (EEPROMs).
"We really wanted to get the HAT+ standard right, as it’s likely to be around for as long as the old HAT standard. One of the reasons for the delay in getting the PCIe connector standard published was our sense that PCIe boards (PIPs!) that go on top, rather than boards that go beneath, should probably be HAT+ boards. Ours is going to be!"
The two standard documents are available as PDF downloads: the Raspberry Pi Connector for PCIe standard and the draft Raspberry Pi HAT+ Specification. Adams says the official M.2 M Key HAT+, meanwhile, is "in the final stage of prototyping," and should be ready for release early 2024.