Perceive's Ergo 2 Offers Multi-Model On-Device Machine Learning in a Sub-100mW Power Envelope

Offering a claimed four times the compute of the original, Perceive's latest system-on-chip comes with some impressive efficiency claims.

Perceive, a specialist in artificial intelligence at the edge, has announced the launch of the Ergo 2 — a deep learning processor that it claims offers four times the performance of the company's first-generation design in a sub-100mW power envelope.

"With the new Ergo 2 processor, we have expanded our ability to provide device manufacturers with a path to building their most ambitious products," claims Steve Tieg, Perceive's founder and chief executive, of the company's second-generation chip design. "These can include transformer models for language or visual processing, video processing at higher frame rates, and even combining multiple, large neural networks in a single application."

The Ergo 2 builds, as its name implies, on Perceive's original Ergo edge AI processor — but delivers, the company claims, four times the compute performance. In real-world terms, that translates to an impressive 1,106 inferences per second for MobileNet-V2, 979 for ResNet-50, and 115 for YoloV5-S — all of which can run on-chip without the need for external memory, Perceive says.

The improved performance from the part, built on GlobalFoundries' 22FDX process node, comes from a new pipelined architecture and unified memory — helping to eliminate bottlenecks when running larger and more complex models. The chip can run multiple independent networks simultaneously, including audio and video models, and draws under 100mW worst-case — and as little as 17mW when running inferencing across a video feed at 30 frames per second.

The Ergo 2 is a full system-on-chip (SOC) design, rather than a simple accelerator: there's a Synopsis ARC EM7D microprocessor in addition to a quartet of neural network processing clusters. Both share the unified on-chip static RAM (SRAM), while peripherals include MIPI Camera Serial Interface (CSI), I2S, SPI, I2C, SDIO, SCCM/I2C for camera control, and up to 53 1.8V general-purpose input/output (GPIO) pins with up to eight supporting 3.3/1.8V operation and four offering pulse-width modulation (PWM).

Perceive's new chip is launching in two variants: the High Efficiency (HE) model runs its CPU and fabric clock at 250MHz and the image processor at 333MHz, supporting an eight megapixel image sensor at 30 frames per second; the High Performance (HP) version draws more power but increases the CPU and fabric clock to 333MHz and the image processor to 433MHz, offering support for a 12 megapixel image sensor at 30 frames per second or a 16 megapixel sensor at 24 frames per second.

More information on the Ergo 2 is available on the Perceive website; the company has not announced pricing.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire:
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