NASA, Microchip, SiFive Announces Partnership for RISC-V Spaceflight Computing Platform

Designed to replace existing systems still using a processor design from 1997, the RISC-V-powered chip will offer 100 times the performance.

NASA has confirmed a partnership with Microchip and SiFive to create a space-centric processor built around the free and open source RISC-V architecture: the High-Performance Spaceflight Computing (HPSC) chip.

"This cutting-edge spaceflight processor will have a tremendous impact on our future space missions and even technologies here on Earth," claims Niki Werkheiser, director of technology maturation at NASA's Space Technology Mission Directorate. "This effort will amplify existing spacecraft capabilities and enable new ones and could ultimately be used by virtually every future space mission, all benefiting from more capable flight computing."

At present, NASA's spacecraft typically use the RAD750. Created by BAE Systems in partnership with IBM, the RAD750 is a single-board computer built around a radiation-hardened version of IBM's PowerPC 750 β€” and it was launched in 2001, making it a 21-year-old component based on a chip from 1997.

"Our current spaceflight computers were developed almost 30 years ago," admits Wesley Powell, NASA's principal technologist for advanced avionics. "While they have served past missions well, future NASA missions demand significantly increased onboard computing capabilities and reliability. The new computing processor will provide the advances required in performance, fault tolerance, and flexibility to meet these future mission needs."

The HPSC, by contrast, will be built around rather more modern components β€” offering, NASA claims, a performance some 100 times greater than current spacecraft computers. At its heart will be 12 RISC-V cores, eight SiFive Intelligence X280 cores with deep-learning acceleration and vector processing capabilities plus an additional four RISC-V cores of unspecified capabilities.

"The X280 demonstrates orders of magnitude performance gains over competing processor technology and our SiFive RISC-V IP allows NASA to take advantage of the support, flexibility, and long-term viability of the fast-growing global RISC-V ecosystem," claims SiFive's Jack Kang of the partnership. "We've always said that with SiFive the future has no limits, and we're excited to see the impact of our innovations extend well beyond our planet."

"We are making a joint investment with NASA on a new trusted and transformative compute platform. It will deliver comprehensive Ethernet networking, advanced artificial intelligence/machine learning processing and connectivity support while offering unprecedented performance gain, fault-tolerance, and security architecture at low power consumption," adds Microchip's Babk Samimi.

"We will foster an industry wide ecosystem of single board computer partners anchored on the HPSC processor and Microchip's complementary space-qualified total system solutions to benefit a new generation of mission-critical edge compute designs optimized for size, weight, and power."

While the HPSC is being developed with NASA in mind, though, the organizations involved believe it could have broader application β€” including use in mission-critical edge-computing projects, industrial automation, edge-AI, and even the Internet of Things (IoT).

The HPSC won't be the first RISC-V cores in space, however: earlier this year the Trisat-R nanosatellite was launched on the European Space Agency's VEGA-C rocket, carrying a computing system based on Cobham Gaisler's NOEL-V RISC-V implementation β€” itself a successor to LEON, developed as a space-suitable version of the OpenSPARC architecture.

More information on the HPSC project is available on the NASA website.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire:
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