MIPS Launches Its First RISC-V Design, the High-Performance eVocore P8700 Multiprocessor

Claimed to outperform rivals in single-threaded performance and scale to 512 cores and 1,024 threads, the eVocore is a strong first shot.

MIPS has announced the launch of its first processor core based on the free and open source RISC-V instruction set architecture, the eVocore P8700 Multiprocessor — capable of scaling up to 512 cores and claimed to offer higher single-threaded performance than rival designs.

"The eVocore family of IP cores including the P8700 represents the continuing evolution of MIPS as we fully embrace RISC-V," claims Desi Banatao, MIPS chief executive officer. "We designed the P8700 to enable customers to take advantage of the power of RISC-V in CPU IP cores that deliver the highest levels of scalability and performance. We believe that our RISC-V P8700 multiprocessor core will help make it possible for companies of all sizes to get to market quickly with innovative SoC solutions."

The eVocore P8700 is certainly an impressive beast, going by MIPS' claims: the out-of-order superscalar design scales up to 64 clusters, 512 cores, and 1,024 threads, boasts a single-threaded performance "greater than what is currently available in other RISC-V CPU IP," and offers optional safety features focused on automotive and industrial use including a fault bus monitor claimed to reduce time to system recovery in the event of an error. MIPS had earlier announced the eVocore I8500, a power-efficient in-order design that scales to 512 cores and 2,048 threads, but has not yet confirmed its availability.

The announcement that MIPS was switching to focus on RISC-V came shortly after its owner, Wave Computing, shuttered its efforts to directly compete with the architecture by offering the MIPS ISA under royalty-free license conditions. Dubbed the MIPS Open Initiative, the effort was launched by MIPS president Art Swift in December 2018 — then abruptly cancelled without warning in November 2019.

The company's RISC-V efforts, though, appear to be off to a stronger start: the company has also licensed the P8700 to Intel-owned autonomous driving and driver assistance specialist Mobileye for use in the company's EyeQ Ultra systems-on-chips. "The new MIPS eVocore CPUs provide not only the unrivaled combination of performance and efficiency that MIPS is known for," claims Mobileye's Elchanan Rushinek, "but also the differentiation of an open software development environment."

MIPS has confirmed that the P8700 is available to license now in standard and automotive/industrial variants, though without stating pricing — and it may be some time before the first commercial products featuring the IP begin to filter into the market. More information is available on the MIPS website.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire: freelance@halfacree.co.uk.
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