MIPI Alliance Launches I3C v1.1, Bringing the Interface Speed Close to 100MHz
Available now to members, I3C v1.1 ups the maximum speed close to 100MHz while adding new features for novel applications.
The Mobile Industry Processor Interface (MIPI) Alliance has announced the first major update to its I3C standard, designed to replace I2C, bringing it to v1.1 and adding the ability to use additional bus lanes to bring its interface speed to near 100MHz.
"Delivering a dramatic speed increase and a host of new features to enhance reliability, MIPI I3C v1.1 significantly strengthens the upgrade path for I2C implementers and enables many different use cases across mobile and multiple other markets including automotive, PC clients, data centres, drones, industrial, and the Internet of Things (IoT),” claims Joel Huloux, chair of the MIPI Alliance. “The specification is ideal for system-level implementers seeking a low-cost, off-the-shelf standardised utility bus solution with a small printed circuit board (PCB) footprint and a well-defined and readily available ecosystem of peripherals, sensors and applications.”
"In developing MIPI I3C v1.1, the working group relied on input from real-world market experiences to put in place what was missing and deliver the final capabilities to enable I2C implementers to move to I3C," adds Ken Foust, MIPI I3C Working Group chair. "As we look at the next evolution of MIPI I3C, the working group will be considering a range of new capabilities, including longer reach, various specification development improvements, more automotive requirements, speed increases, new multi-lane uses, new PHY approaches, standardised connectors and other feature refinements."
The new I3C v1.1 standard adds, in addition to the speed boost, grouped addressing, enhanced error detection and recovery, node reset, comprehensive flow control, outside end transfer, and additional command, control, and communication capabilities. The Alliance claims these, taken together, enable a whole new set of applications, including DIMM5 memory control, always-on imaging, communications debugging, sensor device command, control, and data transport, and power management.
The Alliance has also added a software framework dubbed Discovery and Configuration (MIPI DisCo) for I3C, and plans to release host controller interface and a bare-metal debug interface for the I3C v1.1 standard later this year,
The new standard is available to MIPI Alliance members now, with more information — though not yet a public release — available on the organization's website. The Alliance has also posted a Q&A with Foust on the release of the new standard.