We have looked lots at how we can use Vitis for both the embedded and acceleration flows in our designs when we are using Zynq and Zynq MPSoC devices.
Another great aspect of Vitis is the ability to create a platform solution, which includes different processing elements in the PS and even in the PL.
In this blog, we are going to look at how we can use Vitis embedded flow to develop a platform solution on the Zynq that uses both the Cortex A9 in the PS and a MicroBlaze in the PL. Our target board will be the MicroZed 7020.
The first thing we need to do is to create a new project targeting the MicroZed 7020.
With the project created, the next step is to create a block diagram and add in the Zynq processing system. Once the processing system has been added, run the block automation to configure the Zynq PS for its MicroZed implementation.
The next step is to add in a MicroBlaze Processing block and configure it for a minimal area.
With the MicroBlaze added, the next step is to configure the Zynq A9 — this includes disabling the APU timer and enabling the S_AXI_GP0 port on the PS / PL Interface.
We can then run the connection automation, which will create a base MicroBlaze system and connect it to the Zynq PS. As we connect the MicroBlaze Peripheral AXI port to the GP Slave port on the Zynq PS, the MicroBlaze can access several of the peripherals and memories that are available to the Zynq PS.
The final stages are to create a HDL wrapper, generate the bitstream, and export the XSA.
Once Vitis is launched, the first thing we want to do is create a application project. This will also create a new system project — it is to this system project that we will add domains.
The first domain will be created in the platform automatically when the application project is created.
Add in the platform just created using Vivado, click on the + button, and point the dialog to the exported XSA. When prompted to select the processor for the domain, select the Cortex A9_0 processor
Follow the dialog through and create a hello world example targeting the Cortex-A9 core 0.
This will open a new application project and a system project long with the platform. Under the platform you will see the Zynq domain already exists along with the FSBL.
To be able to add in the MicroBlaze application, we need to add a new domain to the platform. Open the platform.spr project file and click the + button to add a new domain.
Enter a name for the domain and select the MicroBlaze processor.
Once this has been completed, you will see under the platform two domains — one for the Zynq A9 and another for the MicroBlaze.
We can now rebuild the platform. This will recompile the Board Support Packages and FSBL as required.
To create the second application for the MicroBlaze, select the system project and right click on it to add a application project.
This will open a project creation dialog. Enter a project name — the system project name should be automatically completed.
When prompted to select a domain, choose the MicroBlaze domain that twas just created and again select the hello world example.
This will result in two application projects under the system project.
Modify the hello world application in both projects to reflect which processor they are messaging from
print("Hello World From Zynq\n\r");
print("Hello World From MicroBlaze\n\r");
We want to run the MicroBlaze code from its internal BRAM. Select the linker file available under the source directory and delete it.
From the Xilinx menu, select the Generate Linker Script option.
This will open a dialog, which will create a new linker script. Check that the code, data, heap, and stack reside within the local memory BRAM.
We can now build the system project and download it for testing on the MicroZed.
To do so, we need to create a new debug configuration. Select System Project Debug and create a new debug configuration.
This will be auto populated, to configure the Zynq PS and PL, run any necessary post configuration scripts before downloading the executable images to the processors before halting them at design entry.
Once the MicroZed is configured, we can then single step or run the processors as desired in the application.
Of course, in this example both processors are sharing the same UART hence I ran one processor after the other.
This is a very simple example of how a multiprocessor system can be defined and developed using Vitis. It also shows the power of being able to develop platform level system solutions and perform the appropriate debugging.
If we want to create a more complex example, we need to take careful consideration regarding multiprocessor communication, e.g. Mutex, mail boxes, and shared memories (see here P1, P2 & P3 for examples).
As we progress with our Vitis application, I am sure we will be using this approach in more complex applications and projects going forward!
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