Matthew Venn has announced the opening of Tiny Tapeout 3, an educational program designed to demystify chip design in which 250 designs will be sent for manufacture into physical components in partnership with design house Efabless.
"Semiconductors are so important in our daily lives," Venn explains of the program. "We depend on them for so many things, but not many of us really know how they're designed or made — and Tiny Tapeout is designed for high-school students, for undergrads, for hobbyists, for anyone who's interested in learning more."
The Tiny Tapeout program launched last year as a spin-off from Venn's Zero to ASIC course, which sought to take university-level students with no prior chip design experience to the point of being able to design their own application-specific integrated circuit (ASIC). Tiny Tapeout lowers the barrier to entry with a simpler approach, but the goal is the same: the creation of a custom physical chip, fabricated using the Efabless platform.
The third-generation Tiny Tapeout brings with it access to SiliWiz, a tool developed by Venn and colleague Uri Shaked which aims to provide a gentler introduction to exactly what goes into designing a chip at the semiconductor level. "Semiconductors are the most important technology of the 21st century," Venn explained when opening the tool up to the public last month, "but only a tiny fraction of us know how they work or are designed and made."
Those progressing to the design stage of the program can use the Wokwi digital design and simulation tool or create their chip designs in a hardware description language (HDL) like Verilog or Amaranth. Unlike the Google-funded Open Multi-Project Wafer (Open MPW) program, which is also based on the Efabless platform, Tiny Tapeout is a paid-for project: users can submit a design for $25, or receive a physical chip and a PCB for $100 plus shipping.
More information is available on the Tiny Tapeout website, with 197 manufacturing and 49 design-only places left at the time of writing.