Low-Power Cryptographic Smart Chip Senses, Stores, Computes, and Secures Data

Penn State researchers used molybdenum disulfide, a 2D material, to create a low-power cryptographic chip less than one nanometer thick.

Cabe Atwell
a month agoSensors / Security
By utilizing molybdenum disulfide, a 2D material, researchers at Penn State have fabricated a low-power cryptographic chip less than one nanometer thick. (📷: Kelby Hochreither / Penn State)

In our modern world, we are surrounded by sensors that continuously collect, consume, store, and communicate a huge volume of information—information that is increasingly vulnerable to theft and misuse. IoT edge sensors tend to operate with limited hardware resources and at low energy budgets, making it difficult to implement ciphering algorithms. A solution proposed by researchers at Penn State, led by Saptarshi Das, demonstrates an “all-in-one” 8 x 8 area of robust, low-power, bio-inspired crypto engines that can integrate with IoT edge sensors, enabling data encryption.

Since silicon, which is commonly used to make cellphone transistors, would not be able to build a transistor small enough to limit energy use, the team turned to 2D materials. Specifically, they turned to molybdenum disulfide or MoS2, a material less than one nanometer thick, to create a low-power cryptographic chip.

Basing the chip design on MoS2, Penn State’s smart hardware platform mitigates energy consumption while adding a layer of security. Exploiting the optoelectronic sensing and in-memory computing capabilities of 2D memtransistors based on photosensitive monolayer MoS2, it is possible to introduce near sensor and robust security solutions for IoT edge devices with minimal hardware investments and frugal energy expenditure. 2D memtransistors are three-terminal devices rather than two, and their additional gate terminal allows both nonvolatile and analog programming of the conductance states as well as electrostatic control of the 2D channel.

The chip design employs three hundred and twenty MoS2 transistors, each of which has a sensing unit, a storage unit, and a computing unit to encrypt the data. In this way, the chips are self-sufficient, offering all-in-one IoT capabilities, including security. State-of-the-art silicon-based complementary metal oxide semiconductors or CMOS, by contrast, are limited in terms of memory and computer integration due to their traditional von-Neumann computing architecture. Non-von-Neumann platforms such as field programmable gate arrays or FPGAs, however, lack sensing capabilities and require CMOS peripherals. The proposed three-terminal memtransistor technology — with the added feature of photosensitivity due to the material properties of MoS2 — offers a holistic solution that is critical to achieving integrated and energy- and area-efficient solutions.

An 8x8 crossbar array was fabricated for testing, the methods and results of which are published in Nature Communications. Using machine learning algorithms to study output patterns and predict input information, the research team found that these arrays should be safe from eavesdroppers, given finite resources and access to deep neural networks. That is, advanced machine codes couldn’t decode encrypted information, and without prior knowledge of the information channels and decoding variables, it would be extremely difficult to do so.

In the near future, Das and the team plan to reach out to federal agencies and private corporations specializing in smart security in order to expand the scope of the research.

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