Daniel Grießhaber’s SAP-1 8-Bit Processor Uses Discrete Logic Chips in a Refined Design

Software engineer Daniel Grießhaber has designed several novel devices over the years that deal with everything from testing Wi-Fi…

Cabe Atwell
a year ago

Software engineer Daniel Grießhaber has designed several novel devices over the years that deal with everything from testing Wi-Fi security to how much power is consumed by USB devices. His latest project entails creating a simple 8-bit processor using a series of discrete logic chips, which he based on engineer Ben Eater’s breadboard computer from back in 2015. By comparison, Grießhaber’s SAP-1 (Simple as Possible) microprocessor offers a more refined design over his predecessor’s, with its sleek custom PCB neatly packed with electronic components.

On the hardware end, the SAP-1 is populated by a series of discrete logic chips with a 400Hz clock, 8-bit data BUS, 16-bit control word, 16-bytes of RAM, and 5-micro steps per instructions. The board is also outfitted with a clock with adjustable frequency and single-step button, 2X 8-bit Data Registers (A & B), and an ALU implementing sum and difference between Registers A & B carry and zero flag. There’s also a FLAGS register to save the ALU flags between instructions, a 4-bit instruction counter with load (jump), and an output module to display a byte as a positive decimal or 2s-complement with data latch.

Programming the SAP-1 is done using an instruction decoder to run the microcode of the 16 different instructions with 5 microinstructions each and uses a 16-bit control word to control the other modules. Grießhaber has uploaded extensive documentation for SAP-1’s ISA (Instruction Set Architecture) as well as the code necessary to program the EEPROM LUTs on his GitHub page. He’s even included schematics, tools, and simulation/emulation packages for those looking to recreate his design.

Related articles
Sponsored articles
Related articles