Codasip Launches New L11, L31 RISC-V Cores with TinyML TensorFlow Lite for Microcontrollers Support

Edge AI focus for the company's latest embedded cores brings with it the promise of TensorFlow Lite support across its whole range.

Codasip has launched two new RISC-V processor cores, the L11 and L31, which it claims are ideally suited for use in delivery edge AI via tinyML — thanks to the company's first official support for TensorFlow Lite for Microcontrollers.

Slotting into the company's 1-Series and 3-Series families of low-power embedded processor cores, as replacements for the L10 and L30, which now stand as available but "not recommended for new designs," the new L11 and L31 cores are three-stage implementations of the free and open-source RISC-V instruction set architecture.

The L11 uses the RV32EMC instruction set, while the L31 opts for RV32IMC — meaning both have integer multiplication and division and compressed instruction support, but the L11 has just 16 registers and a sequential multiplier to the L31's 32 register and parallel multiplier.

The biggest change from the L10 and L30: The introduction of official support for TensorFlow Lite for Microcontrollers, allowing the resource-constrained embedded cores to run machine learning workloads at the edge. At the same time, the company is encouraging anyone licensing the cores to add custom instructions for specific tasks — releasing a white paper demonstrating how adding just two instructions to the L31 can improve performance-power-area (PPA) for image classification by up to 10 per cent.

"Licensing the CodAL description of a RISC-V core gives Codasip customers a full architecture license enabling both the ISA and microarchitecture to be customized," explains Codasip's chief technical officer Zdeněk Přikry. "The new L11/31 cores make it even easier to add features our customers were asking for, such as edge AI, into the smallest, lowest power embedded processor designs."

While the L11 and L31 are the first in Codasip's RISC-V range to support TensorFlow Lite for Microcontrollers, they're not going to be the last: The company has confirmed plans to add support "across Codasip's entire portfolio of RISC-V cores" — but did not provide a timescale.

Interested parties can read more about Codasip's cores, and access the white paper, on the company's website; those looking to try out any of the cores can request an evaluation kit, which includes a Digilent Nexys A7 FPGA board for testing.

Gareth Halfacree
Freelance journalist, technical author, hacker, tinkerer, erstwhile sysadmin. For hire: freelance@halfacree.co.uk.
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