XMOS Adopts RISC-V for Next-Generation xcore Software-Defined Systems-on-Chips

Intelligent Internet of Things (IoT) specialist XMOS has announced its next-generation xcore processor platform — in which it's breaking with tradition and taking a leaf from the free and open source RISC-V instruction set architecture (ISA), making something it says is a "RISC-V compatible architecture."

"We see xcore as the cutting-edge platform for the intelligent IoT. Xcore software-defined SoCs [systems-on-chips] deliver unparalleled cost-effectiveness, efficiency, and versatility to a market so fragmented that traditional SoC timescales and economics are failing," claims XMOS chief technology officer Henk Muller. "By combining xcore and RISC-V, we open xcore’s potential up to a much larger pool of talent; xcore and RISC-V developers now have common ground for the foundations of the intelligent IoT."

The company is keen to distinguish its parts from the broader RISC-V ecosystem, however: It describes the new xcore design as a "RISC-V compatible architecture," rather than a straight implementation of a specific RISC-V specification — something allowed by the permissive licensing of the RISC-V ISA, in which designers and developers are encouraged to modify, extend, and experiment with the instruction set architecture rather than be locked into a one-size-fits-all proprietary implementation.

Despite this, compatibility with existing RISC-V toolchains should be strong: XMOS claims that developers will "have access to the technical advantages of the xcore platform while using the tools and processors than they are most accustomed to." The xcore approach of "software-defined SoCs" with flexible resources will remain in the next generation, the company has confirmed.

"Bringing the capabilities of XMOS and RISC-V together represents a great platform for developers to come together and realize greater potential in leveraging an open ISA for intelligent IoT," claims Calista Redmond, chief executive officer of RISC-V International, which is hosting the RISC-V Summit in San Jose this week.

The new xcore parts won't be ready for sampling until next year, XMOS has confirmed, but to whet developers' appetites the company has released a short whitepaper on its website introducing the new architecture.